Hello
I need to find a µController that is going to be put to sleep/idle mode and then wake up when an analog input exceeds a pre set internal value. The value is set inside the µController before sleep/idle mode.
I have only found µC's that compares two analog signal levels (not comparing an analog level with an internal value).
and
aring
Look at SiLabs family- many have a SFR to compare the ADC against, and can generate an interrupt. Because it compares the ADC result, you do have to trigger the ADC periodically, to refresh the comparison. So the core can sleep, but the timers need to run & the ADC triggers from those.
-jg
"Ben" schreef in bericht news:461e039c$0$90273$ snipped-for-privacy@news.sunsite.dk...
I do not think you will find a microcontroller that can do that. There are 2 solutions I can think of:
- use the uC that can compare 2 analog levels and use a DA convertor for the preset value (this could be in same uC)
- use a timer to wakeup the uC and start a AD conversion, sleep until ADC is finished, read and compare the value
Frank
The Analogue Compare is an analogue function.... hence a comparator, inside or or outside has current draw.
You will have to do a deep search on the micro controllers data sheet to see weather the comparator "on-board" can operate while the uC is idle / a sleep.
Joe
Look at SiLabs family- many have a SFR to compare the ADC against, and can generate an interrupt. Because it compares the ADC result, you do have to trigger the ADC periodically, to refresh the comparison. So the core can sleep, but the timers need to run & the ADC triggers from those.
-jg
How quickly does the input change? Could you just wake periodically and convert, compare and then decide whether to start. Generating a reference voltage to wake from will be power hungry.
Another approach may be to use a comparator, and pre-charge an external capacitor to the wake-up reference voltage, and wake periodically to refresh the capacitor value.
Both of the above are likely to be more power- and cost-efficient than finding something to wake at a programmable voltage.
MSP430.
Need some more specs here, like how much sleep current is acceptable. In most uC the comparator is quite power hungry because it is designed to be fast. Some ideas:
a. External comparator, as some have suggested. Besides regularly replenishing a cap to compare against you could also provide a low current DAC or a serial register plus (highish) R2R resistors. The old
74HC164 comes to mind.b. If the signal change is guaranteed to be fast enough you could also use an external differentiator that just hits the rail when something changes too much. When it does, let it cause a regular port pin interrupt and have the uC look whether the signal level is above or below the threshold. Kind of the electronic equivalent of a motion detector.
-- Regards, Joerg http://www.analogconsultants.com
Some micros have a built-in analog comparator which can be used to generate an interrupt, which in turn will wake the micro. Built-in low-power DACs are less common (but, for example, some the 80C51 derivatives have them), however some micros such as the PIC18F4220 have a crude DAC that works over a limited range for dividing the supply voltage down as an optional comparator input. Of course the micro draws more current when that stuff is turned on. As always, if you don't like the on-board peripherals, you can certainly subsitute your own, and you may end up with a better solution that way.
Best regards, Spehro Pefhany
-- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
If the input signal does not change very fast, just charge a capacitor from the signal using a suitable resistor. A fixed voltage comparator monitors the capacitance voltage. When the comparator trips, it generates an interrupt. Assuming that some kind of low power real time clock is available (say some 32 kHz CMOS clock), read the time since the capacitor charging started. Finally reset the capacitor voltage either directly with the comparator or with an output pin from the interrupt service routine.
The larger the input voltage, the faster the capacitor will be charged and the comparator will trip more often. Due to the exponential voltage change and various leakage currents, some care is required when relating the time between interrupts and the actual input voltage.
Paul
and
aring
Check the HCS08 family of Freescale micro. E.g. QG8 has an analog comparator, which compares to an internal value and can wake up the micro from wait mode. Petr
Thank you, I will check that out.
Still sounds like the SiLabs devices are a good fit. Their ADCs have window limit sense registers, and they can trigger from Timer INTs, - the comparitors are also low power, and have Icc's from 1uA to 13uA . Or, you can turn off the ADC completely, and wakeup the device on a timer, and then enable/read/sleep the ADC
-jg
aring
You can add an external 'Digital Potentiometers' and have the wiper as a reference for the internal (or external) analog comparator. With a potentiometer in 100-200Kohm range you'll burn 10-50uA, depends of your Vdd.
A [voltage] DAC is usually buffered, so it will burn current for the output stage.
-- mmihai
Many of those internal comparators gobble a lot of power, probably groomed for speed.
There is one other rather unorthodox trick to do it on the cheap: Many uC have a temp sensor on board. Temperature changes slowly so it could be pinged at a very low rate. An external transistor could be hooked up as a poor man's comparator, consuming next to nothing while not conducting. A few port pins could send in a wee compensating current to make up for temp-based Vbe changes. This transistor would then tug on a pulled up port pin when a certain value is exceeded. Of course that pin needs to have Schmitt characteristics but many uCs feature that these days (mind the cross current of that, too).
-- Regards, Joerg http://www.analogconsultants.com
Not likely to have better than 5 bits of precision, and you have to watch the port linear currents. The better uC can wake up their Comparitors, and ADCs, and the OP only need a slow update (100ms IIRC) so the current of any gated Analog soln will average quite low. The system would need a Dual-Osc design to really drive down the Icc, as the MHz Osc current will dominate, with the core in idle.
-jg
10 microseconds on the PICs, IIRC. Not exactly a speed demon. Even an LMC7211 (7uA Idd. ~USD0.45 in 1K) is more than twice as fast.
I don't quite follow what you're getting at here. You have an unknown voltage and you want to wake the micro when it (say) exceeds a certain (presumably programmable) threshold. You have a bunch of digital port pins carrying CMOS levels when lightly loaded (Vdd/Vss) How would the transistor help?
Best regards, Spehro Pefhany
-- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
That is indeed freaking slow...
This is how I did that on a switcher built from discretes (mostly for cost reasons): A transistor sits with its emitter on GND. R from base to GND. R from base to voltage to be measured. Several Rs from base to port pins, or in my case a register. Collector to Schmitt port pin with pull-up. That was pretty much it. The transistor turns on when Vbe reaches about 600mV. About, because that's different with temperature. The uC can compensate for that via adjusting the current into the base. Of course all this needs to be very low.
If the desired threshold is above 700mV or so all steering resistors could steer to GND, meaning that there won't be a current draw from VCC unless the transistor has turned on. But then the interrupt routine does it's thing anyhow. Instead of using high, low and tri-state you might get away using only low and tri-state.
If it has to be super precise I guess one could possibly use a TLV431.
-- Regards, Joerg http://www.analogconsultants.com
I don't know how much resolution Ben needs here. Linear currents? Usually not a concern in this case. Except for cross currents in the Schmitt input first stage that would need to enter into the battery life calcs.
If the wake-up time and polling frequency is acceptable, yes. But it would be in essence a polling scheme, not strictly interrupt-driven anymore, except for the fact that the polling routine would generate an interrupt if it finds the level above threshold. In my cases we often could not afford the wait though. The interrupt needed to issue pretty much right now.
-- Regards, Joerg http://www.analogconsultants.com
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