Comparison of LEON2, Microblaze and Openrisc processors

A master thesis comparing the LEON2, Microblaze and Openrisc-1200 processors has been carried out by two students from the Chalmers University in Sweden. The final report is now available online at:

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Jiri Gaisler

Gaisler Research

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jiri_gaisler
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I would have thought that a comparison of synthesisable cores would have included a Nios 2 as well, and would have included other fpga targets - the conclusions might have been wildly different if an Altera fpga were used, or even if a different Xilinx fpga were used rather than just the one Virtex II. The thesis claims to cover portability, yet only considers "porting" the cores to a single Virtex II board! As open designs, the Leon2 and Openrisc cpus are a world apart on portability compared to vendor-specific cores like the Microblaze and the Nios. I think it is also important to make version information clear - I don't know details about the processors here, but the Nios family has changed dramatically in the year or so that I've been using it, and such comparisons are only valid for a particular generation of the cores.

Reply to
David

During the mentioned study, we were limited to a Virtex-II board and could thus not evaluate the Nios processor. However, we have ordered an Altera Cyclone board with the Nios-II design kit. A follow-up study will be made this spring, evaluating Nios-II and LEON2 on Altera hardware. It is not possible to evaluate Microblaze and Nios on the same hardware since only mapped netlists are provided with their design kits.

Jiri.

Reply to
jiri_gaisler

I appreciate that you can't evaluate a Nios 2 on a Xilinx fpga, or a Microblaze on an Altera fpga (or either on other fpga's), so any sort of comparison matrix is going to have gaps in it. I also appreciate that testing different cpus on different fpgas takes time and costs money (unless you can borrow the boards). I just object to the idea of a thesis claiming to be a general comparison of synthesizable cpu cores but missing out what is probably the most commonly used core, and which claims to address portability yet limits this to a single fpga from a single vendor. At the very least, your thesis should make these limitations abundantly clear, and you could give limited information (such as performance and size estimates from the design software) for high and low-end chips.

Still, the paper provides some useful information for people looking at these cores, and it's good of you to make it publicly available.

mvh.,

David

Reply to
David

"jiri_gaisler" skrev i meddelandet news: snipped-for-privacy@c13g2000cwb.googlegroups.com...

The big question is if it makes sense to use 2-8000 CLBs for a CPU in the first place? Reasonably, such a chip will need to have an external flash memory and the pins between the FPGA and the Flash.

Think it will be hard to pricewise meet a hardwired solution with internal/external CPU. Think it would be nice to compare with a solution based on the AT91FR40162 (10 x 10 mm) running 60 MIPS at 20 mW with a smaller FPGA.

The FPSLIC and some PowerPC equipped Virtex are another approach which should be more cost effective for most applications

One advantage of implementing in FPGA, is it allows you to migrate if chips become obsolete. Then again, going with a Microblaze will force you into Xilinx FPGAs, and if you choose the Leon/OpenRISC, the core is more expensive.

Building your own chip, is of course more fun!

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Reply to
Ulf Samuelsson

Good point, but... It depends upon the problem.

Lots of interesting problems will fit into on-chip RAM. They might fit better into a special purpose CPU. That costs more design time.

External serial flash will be horribly slow, but might be good enough for some problems. Only takes a few pins. You could use on chip RAM for a cache or load it explicitly (bank switching).

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Reply to
Hal Murray

The PicoBlaze, and tiniest variant of NIOS are interesting forthis

Yes, a core that used 50MHz SPI memory, and was optimised for serial-code fetch could be quite interesting....

-jg

Reply to
Jim Granville

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