Changing refresh rate for DRAM while in operation?

The most obvious question would be 'Why?'

That will limit your options (as would probably most other vendor IP DRAM controllers).

A simpler way would be to simply have a DRAM controller that has an explicit 'Refresh Request' input that would cause the controller to perform a refresh. Then connect that input up to any programmable timer or other logic that you would like to use. Changing the clock rate would be far down on my list of ways to accomplish your goal....but again, it begs the original question about why you would want to change the refresh rate dynamically at all.

KJ

Why?

Assuming he has a good reason to change it, the safest thing to do would be to call a routine in flash to change it.

Since the only purpose of the refresh circuitry is to avoid the memory dropping bits, it should already be running at the slowest possible rate, and speed reduction will be harmful, while speed increase will do no good. So this is not a good idea.

What are you trying to do?

I disagree (softly), having designed several memory controllers, I always found it easier to just insert a READ DATA command into the DRAM when a refresh was needed, rather than insert a refresh command. The timing differences between refresh and a loosly coupled string of READS is such that one can refresh ahead with READs easier and then be in a position to absorb a longer string of demand requests by not using the REFRESH commands. Thus while running at the slowest overall rate, one can bunch and distribute the refresh mechanics to better interleave same with the demand memory requests and gain something.

But I will state the overall performance differences are a fraction of the refresh overhead anyways.

That is the real question.

If the idea is to reduce the refresh overhead on a busy bus, reducing the relatively slow refresh rate does not make much sense.

However, if the memory content is to be maintained for a long time without any data access in a battery powered device, it would make sense to reduce the refresh rate at low ambient temperatures. The high refresh rates are needed at the top end of the temperature range, but at lower temperatures, a slower refresh rate would be sufficient, which reduces the power consumption and increase battery life. Unfortunately, refresh rate figures are seldom available for lower temperatures.

Paul

If you were really aiming for long run time on battery power, I suppose you'd just use DRAM devices specifically made for such an application.

Mobile SDRAM devices often have a temperature compensated self refresh feature. You just enter a special suspend mode and the device does the refresh itself, and only as often as required according to the current temperature. You can also tell it to just refresh a part of the memory array, in case you don't use it all.

This is usually way better than anything one could do on his/her own.

So, the question still stands: What does the OP really want to do?

cu, Sean

Since the OP seems to have disappeared to wherever OPs go, I suspect we will never find out.

Don't you just hate it when that happens? Even if the OP now realises that what he was trying to do wasn't appropriate or necessary, it would be nice if he just explained his original intentions to us.

He's probably sorry about the flame war he unintentionally created but thinks it would have been nice if one of the 25 replies answered his original question...

The very first reply to the original post did answer the OP's original question.

The rest of the thread has been for entertainment and educational value.

KJ

I didn't disappear, I posted a reply but for some reason it didn't show up... I didn't want to accidentally spam the newsgroups by reposting and figured I'd wait to make sure it wasn't just my newsreader or ISP causing the problem.

Anyway, I guess I'll answer the reason why I want to do this in the same post.

I'm trying to characterize a DRAM device in certain environmental (radiation) conditions and see how that effects the retention characteristics. I'm not sure if there tests the industry uses to do this, but I needed to evaluate it realtime.

I'm using the core Altera provided but all the code is there (except for the NIOS II cpu). So I have direct access to the SDRAM controller.

Thanks for giving me the benefit of the doubt. I put this in another reply, but the reason I want to change it is to characterize the DRAM to get it's retention characteristics in a radiation environment. So I want to know how long the DRAM keeps it's charge given a specific and controlled environment.

Interfacing, programming, and DRAM definitely aren't my areas of study (materials is). This is for a small but time consuming part of my thesis project.

Thanks, eric

I know the mode register is initialized at the beginning with the refresh rate (and some other information). Is it possible to reload the mode register and will this do anything to the stored data (such as letting all the caps discharge)? Is this even possible?

I do appreciate everyone's replies and I certainly didn't mean to ignore your answers and questions that were trying to help me.

Paul mentioned in his reply that it makes sense to do it in different temperatures. This really is similar to what I am trying to do. I'm trying to figure out (partly) if the refresh rate will help with the radiation tolerance of the device (i.e. speeding it up).

(snip)

Probably so, but it isn't at all obvious how to answer. The DRAM doesn't care as long as every row is refreshed within the specified amount of time. Some refresh all rows in a big burst, others one at a time uniformly over the interval. You can refresh faster than the specified rate, but there is no system independent way to describe how to do that. For systems with a variable speed clock (such as power saving modes) one does have to design the refresh system appropriately.

-- glen

Here is a free suggestion (the price is right): I would write a specific word-pattern with an even mix of 1 and 0 into every location in the whole DRAM. Then read back sequentially at a slow pace through all addresses, always checking the readback. Sooner or later, you will pick up an error, becaue you exceeded the refresh delay. You may want to repeat this with different starting addresses and with different word patterns.

My opinion: SEU errors have little to do with refresh delay, since an ion can tip over even a fully charged bit. But that seems to be what you want to find out... Peter Alfke

disappeared to wherever OPs go, I

eh, there used to be a special software that allows a DRAM to work as black white camera

it was using 64K x 1 military DRAMs, with REMOVED top lid, directly connected to PC LPT port.

the software measured the refresh of each cell, what is proportional to the light the author of that software had some "photos" taken with DRAM online too. and eh it wasnt me. but one of my first self-made homecomputers used the same military gold-ceramic packaged DRAMs

Antti

Please see the thread entitled: "Poor Man's image sensor; Was: Re: Simple Still Camera components?" from June of this year (in comp.arch.embedded).

If anyone wants it and cannot find it, I have the archive of this project's code and documentation (in German, filename: kuckuck.zip).

Regards,

Michael

The problem is during the read (I'm assuming you mean by disabling the refresh altogether and relying solely on the refresh after read) is that it takes several seconds to read from the DRAM. This will always exceed the refresh time right? From the start_address to end_address it takes quite a while for a 64Mbit DRAM. The spec calls for a 64ms refresh.