C166/C167 stack limited to internal RAM?

Not really as the processor also supports another type of stack addressing using the mov [-Rx], Ry and mov Ry, [Rx+], where Rx and Ry can be any of the 16 registers. At least the tasking/altium compiler has built in support for generating subroutine calls using this sort of addressing. So you are only really limited to 16kB per task stack. Your interrupts still use the main stack, so simply pop'ing the ip/csp/psw and pushing them onto the task stack saves your program state. Note that some other registers also need to be saved, i.e. DPPx, MDL,MDH,MDC (and I believe there is some chip errata to do with clearing MDC).

Using this sort of task switch mechanism, you can acutally keep the amount of main stack to about 10 words of the 32 word minimum size.

Tim

-- Tim Simpson (reply address invalid)

already

Hi Grant, Well - yes it can be... but most often it isn't a problem... Yes, the entire stack has to be switched when doing a context-switch. But it isn't too bad, since a really short and effective assembler loop easily can be constructed for poping and puching the stack content. Further, most compilers for the C16X architecture don't use the internal stack to pass arguments (in subroutine calls). Instead, a separate so called C-stack is used. This spack is placed in ordinary RAM, and is typically accessed by R1 (if I remember correctly). This means that the internal stack will never be "deep". A content in the order of 10-20 words is common. As a side note; the compilers can typically be instructed to either place call-parameters in the internal or the external stack, but the external one is the default behaviour.

Another possiblity to minimize the context-switch time is to enforce a special priority order between processes/tasks. A number of processes/tasks are placed in a non-preemtive group, meaning that they cannot preempt each other... menaing that they can share the same stack. I have written some words about this in a real-time operating system reference document that we have on our web site. You can download it at

-> Download, and then select reference documentation. Another source of informatuon is also the E.R.I.K.A. RTOS, which implements non-preemptable groups.

Regards, Anders Rosvall Embedded Artists

I thought there must some trick like that being used for a multi-tasking system.

That should be more than enough.

[...]

Cool, thanks.

--
Grant Edwards                   grante             Yow!  This PORCUPINE knows
                                  at               his ZIPCODE... And he has
                               visi.com            "VISA"!!

processes/tasks

we

implements

Hi again, I was a bit 'sloppy' in my description above. I actually describe two different techniques above.

1) Non-preemptable groups is a technique to reduce the needed stack space on a microcontroller, since several processes can share the same stack area. In (very) resource-constraint systems, such as a PIC or small AVR this is a common technique. 2) If the priority-ceiling protocol is used, there is no risk that a lower-priority process will execute in place of a higher-priority process (this could happened if the priority-ceiling protocol isn't used, and is called priority inversion). Further, if processes must run to completion (sometimes called singe-shot execution), there is no need to switch stack content. Whenever a new process start executing, it can just continue using the current stack (i.e., a stack-on-a-stack). The current running process will always execute to completion and can only be 'interrupted' by higher-priority processes (which also will run to completion). As you can see, no process has to switch stack space. They can just build on each others stacks. The E.R.I.K.A. RTOS implements this type of system.

//Anders Rosvall