To build the LCPE (Linux Cluster on PCI Express), I am reactivating the MOLE board (designed and shelfed earlier).
LPCE is 16 to 32 MOLEs on PCIe.
To build the MOLE board, I am working on the BGA builder.
---------------------------------------------------------- The MOLE board is a collection of:
Intel Atom 1.6GHz 633MHz FSB (AU80586GE025D S LB73) Micron DDR3 64Mx16 SDRAM 633MHz (MT41J64M16LA-15E:B TR) Micron DDR3 128Mx8 SDRAM 633MHz (MT41J128M8HX-15E:D TR) Xilinx Spartian 3A 333MHz (XC3S50A-4FTG256C) NXP PCIe 250MHz (PX1011B-EL1/G,551)
Memory bus is 64Mx64, plus optional 64Mx6 ECC. XC3S50A is fast enough for PCIe, but might not be fast enough for DDR3. A custom masked ASIC might be necessary for full speed. However, XC3S50A should be good enough for prototype. There are around 800 holes connecting 4 signal layers. Each pad has one or two links in eight possible directions (1,3,5,6,7,8,11 and 12) with or without via.
Routing vias to inside layer connecting pads (TODO). Generating gerber and drill files (TODO). Routing between chips (TODO). Importing and Exporting design files (TODO).