Boolean expressions involving active low logic signals

Maybe this?

__ _ RD ------o| | __ |&|o--- CE A15 ------o|_|

/CE = /RD . /A15

--
Wil

[could you please use an NNTP client that wraps words at something less than 200 characters per line?? :< ]

A better way of showing this would be:

+---\ /RD ---o| \ | )o----- /CE A15 ---o| / +---/

(forgive my crappy rendering :< )

I.e., instead of "positive OR" show the function for what it really is: an AND taking two active low inputs and producing an active low output

Or, /CE = /(RD * /A15)

(DeMorgan)

This is a different function. Assuming you want the signal leaving the circuit (call it whatever you like) to be low when both inputs are low (call *them* whatever you like as well!), then the first drawing was correct.

Wanna try that again, Wil? ;-)

Thanks for the interest. I know the first circuit is right and the second is wrong. My purpose in showing the second circuit is that it is a possible interpretation of my boolean equation, if I have misunderstood the correct way of showing it.

I can see that De Morgan leads to an equivalence between: /CE = /RD + A15 and /CE = /(RD * /A15)

However, my doubt still remains as to whether either of these is correct when dealing with active low signals.

Slide 25 on

states that "The name of active low signals is always written in non-compliment (sic) form". This suggests that I should consider the signals to be called CE and RD which presumably means my equation becomes: CE = RD + A15 At least I think that is what it is telling me.

also has some interesting things to say. On the second page of the article is the statement "Another common practice is the use of a bar above a signal name to indicate active low. This is a bad way to designate active low because the bar above a signal means "perform the NOT operation on this signal." This is a Boolean operation, not a physical interpretation."

This I think is the root cause of my confusion. The examples on the third page look as though they ought to answer my question but they only confuse me more at the moment!

ond

g

ate

not

ird

ttp://archive.chipcenter.com/circuitcellar/august99/c89cd3.htm

This can get very confusing, and even more so if tools allow a At-Pin- inversion. Then, you need to make sure who is flipping where...

As it is only a 'naming convention' thing, my approach is to firstly avoid the over-bar, as that does not always appear at all places.

I also try to avoid hidden inversions, if possible - they can bite you later.... good tools should use available hardware inversion as needed, to reduce logic.

So, applying these rules to your example:

/CE =3D /RD + A15

would become

CEN =3D !(!RDN + A15);

Here, the trailing N replaces the over-bar, and all logic is coded positive logic, using ! (or /) to flip.

Another good convention, is to look at the report generators of your tool flow, and not diverge, or fight what they do too much.

Sometimes you might see

!CEN =3D (!RDN + A15); rather than CEN =3D !(!RDN + A15);

if the report wants to signal to you, it has used a polarity option to optimize the term.

Right. So, this implies:

CE = (RD * /A15)

which you would "read" (aloud) as "Chip enable happens when RD happens and A15 'doesn't happen' "

or

CE happens when Read and (A15 is low)

The fact that "Read" is signalled ELECTRICALLY by a LOW on the /RD signal doesn't influence this reading.

Separate what the signal *means* from the way it is implemented. E.g., the above example tells you what the circuit is "functionally" doing. If you want to know the *details* of this particular implementation, then you look at the *actual* signal names on the wires.

I.e., /RD is LOW when READing. /CE is LOW when CHIP_ENABLE-ing

Don't overthink it. :>