Basic DAC Question

I have three questions about theoretical THD+N distortion while creating sine waves with DACs.

First question: Assuming a perfect DAC with perfect analog components, obviously a DAC with fewer bits will create a sinewave with larger steps, and thus will have a higher percentage of THD+N, but how do I calculate the exact percentage?

Second question: I know about the Nyquist limit and it seems to me that as the Nyquist limit is approached the sinewave will have bigger steps no matter how many bits it has and thus will have a higher percentage of THD+N, but how do I calculate the exact percentage?

Third question; In the real world I wouldn't have perfect analog components; in fact I would purposely introduce a lowpass filter at the output of the DAC to attenuate the switching noise. How much would that change the answers to the questions above?

BACKGROUND:

We need to replace an old system that generates 20 Hz to 20 kHz sine waves with a 12 bit DAC that puts out a 4096-step sine wave -- the same number of steps whether it is putting out 20 Hz or 20 kHz. A variable oscillator changes the clock rate of a counter that gets the values from an EPROM lookup table.

We were discussing replacing the above with a modern DAC -- either

16 bits at 44.1 ksps or 24 bits at 96 ksps. The objection was raised that at 20Khz we are putting out 4096 x 20,000 sps, or 81.92 Msps. I am guessing that 96 ksps with a added filter at the DAC output is good enough. The final power stage starts slew-rate limiting at 30-40 kHz with large signals and the small- signal response is 3dB down at 50Khz and way down in the mud at 100KHz. I just don't see how it needs over 80 megasamples per second to keep the THD+N reasonably low. Am I right?
Reply to
Clueless.Newbie
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If you just want a sine wave, use an Analog Devices DDS chip. For under $10, the whole job is done for you, DAC and all. The effective sample rate will be so high, 20 MHz maybe, that the most primitive output filter will do.

John

Reply to
John Larkin

What is this being used for ?- ie what specs do you need to meet ?

You are right that 20KHz is easier than 20Hz, because the upper frequency can have post filtering, to push any harmonics down. Having said that, going from 82Msps to 96Ksps is a drop of nearly 1000:1, which is a large system change. Will it matter that you now have just over 4 samples per full cycle at 20KHz ?

-jg

Reply to
Jim Granville

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Your numbers don't hold together. 20 kHz sine, with a 4096 step DAC, requires 80 Mhz operation of the DAC, or roughly 10 Ns. Look at the basics first.

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Reply to
CBFalconer

Good idea. They also have an ARM variant ADuC7128), with DDS included, so you might be able to take that, and clone part of the present system interface, into a one chip retro-replacement.

-jg

Reply to
Jim Granville

It's not necessary to hit every step in a sine lookup table, which is why you can get a high-resolution 20 KHz sine wave at a mere 44 KHz (CD) sample rate. At higher frequencies, you can start making many-address hops in the table without penalty. The filter fixes it all up.

The advantage of higher sample rates (say, 96 KHz instead of 44) is that the filter need not be so good, and the zero-order-hold (sinc) rolloff is mostly eliminated.

John

Reply to
John Larkin

I have been curious about that chip since it was released - do you happen to know what it was actually designed for?

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John Devereux
Reply to
John Devereux

The press release says this " For smart sensing applications, the ADuC7128 features a 32-bit on-chip DDS that operates at 21 MHz." -

there are some sensore, like LVDS, that like sine drive. But there are some things they seems to have overlooked, and you get the impression this was a simple cut and paste job.

For example, quadrature sine drive could have been useful, allowing Sin/Cosine meters to be drivem using the Sine ROM. They also have no digital phase path, from the DDS.

It seems you must read the DDS via the ADC, and do the same with a response channel, and then use SW to calculate the Phase.

-jg

Reply to
Jim Granville

Phil Allis>s/n and linearity are not affected. Sampling theory shows that

John Lark>It's not necessary to hit every step in a sine lookup table, which is

With the specified large signal slew rate limit of 30 kHz and small signal rolloff at 50Khz, most of the frequency cmponents that make a 20 kHz 4 samples per cycle stepped waveform different from a pure sine wave are too high for this system to reproduce. Add a filter at the DAC output (which you have to do anyway) and it gets even better. Factor in the fact that THD+N is specified over some frequency range and 4 samples per cycle looks even better. If the THD+N meter was perfect and measured only up to, say, 30kHz, a harmonic at 40 kHz would not be measured. Real THD+N meters will let a bit of the out of band harmonics in, but less and less as the harmonics get higher.

That being said, I have to admit that I also don't know how to calculate the theoretical THD+N in percent starting from the number of bits and the sample rate. I have seen lookup tables for number of bits vs. THD, but not for the sample rate to signal frequency ratio vs. THD. There must be a formula for calculating those numbers, but I can't find it.

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Guy Macon
Reply to
Guy Macon

I just got in a sample board of the old design and looked at it with a scope. I was told that it had a 12 bit DAC that puts out a 4096-step sine wave at 20Hz to 20kHz. On the board I saw an Analog Devices DAC312 Datasheet

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which isn't fast enough.

I set the output to 20Hz, and measured the DAC clock at 82kHz. That seemed right (20*4096=81,920.) As I raised the output frequency the DAC clock went up, but at 626 Hz and 2.6MHz the DAC clock suddenly dropped in half -- but the output frequency didn't. This happened again at 1251Hz, 2501Hz. 5001 Hz. and 10001 Hz. At the top end I saw little stair steps in the output. About 128 of them in each cycle.

It looks to me like the board is going to a different part of the EPROM for a sinewave with fewer steps each time it drops the DAC clock in half. So the 4096 steps are only at low frequencies. There are only 256 steps above 5kHz and 128 steps above 10kHz.

Here is how I think they are doing it:

20*4096 = 81,920 625*4096 = 2,560,000 1,250*2048 = 2,560,000 2,500*1024 = 2,560,000 5,000*512 = 2,560,000 10,000*256 = 2,560,000 20,000*128 = 2,560,000

They also sent me a manual, which is a good thing because they also misinformed me when they said it always puts out sine waves. There is also a setting labeled "PEAK-RMS 1.246" that looks like a sinewave with some hard clipping. It looks nice and clean at 20Hz but at

20kHz not so nice at the output. I need to find out how high they need to go with it. No official word but one of the technicians claims that he has only seen the PEAK-RMS 1.246 setting used at 50, 60, and 400 Hz. Ain't discovering customer requirements grand? I wish they would just tell me what they are trying to accomplish instead of giving me specs that are wrong.
Reply to
Clueless.Newbie

If you want serious discussion read the following sig and the URL.

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Reply to
CBFalconer

Some (most?) spice engines allow table entry, and will do fourier plots, so you could enter the sine LUT into a table and run the fourier ? I recall ~1yr ago, bumping into a table limit in B2Spice, and got them to fix it for this type of use, but no, I have not done this specific table usage.

-jg

Reply to
Jim Granville

CB: do us all a favour and get a newsreader that threads. Then we can look forward to your signal-to-noise ratio improving significantly.

Steve

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Reply to
Steve at fivetrees

There seems no(?) easy way to estimate the THD based on DAC bits and the number of points per cycle and a final filter form. At 20Hz there's a massive number of points building up a each precise single cycle and at 16bits, distortion will naturally be about 0.02%. The filter though will only be stripping off harmonics beyond the

1000th and at a rate dependant on it's rolloff and shape. Up at 20kHz, the reduced points per cycle may be giving an intrinsic 3% THD but the filter will now be biting very hard on the 2nd harmonic and all above. Final distortion entirely dependant on the particular filter used. Pro rata for all intermediate frequencies. It smells like some kind of balancing act is going on that is sufficient to always give a low distortion figure.

Maybe do the new design just the same way as the existing but using a modern 16 bitter. Maybe speed it up as well. The binary dividing method has similarity to the workings of a DDS chip but has a far superior output waveform as there is no distortion added due to (unfilterable) non harmonic spurs and jitter.

Reply to
john

I have one. The advice is on principle.

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Reply to
CBFalconer

It wouldn't do any harm for C.N to include a little context for us latecomers. :-)

Cheers! Rich

Reply to
Rich Grise, Plainclothes Hippie

^^^^

Please take the time to learn that there is no apostrophe in the possessive its.

It damages your credibility.

Regards,

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Apostrophe Police

Unless he really meant "it is". Then something else requires mods.

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Reply to
CBFalconer

The usual expression is that

s/n = 6.02N - 1.249 dB

and is independent of sample rate if the usual sampling rules are followed, and assuming an ideal dac. This assumes that the signal has a gaussian distribution and averages 1/4 of ADC full scale. Whatever the definition of "signal", the improvement in s/n remains 6.02 dB per added bit.

John

Reply to
John Larkin

Why do you want to know the _total_ _harmonic_ distortion for a sampled audio? system ?.

There is always the classical formula for SNR in dB = 1.76 dB +6.02n, in which n is the number of bits.

Some of the noise components are outside the required audio passband, especially when some form of noise shaping is used and thus filtered out.

In a sampled system, you will only get strong _harmonic_ components, when the produced waveform is a subharmonic of the sampling frequency, at other generated frequencies, the same noise power is distributed among a very large number of frequencies, creating a noise floor.

Look at the spectrum for a DDS system, there are usually a noise floor, but at some frequencies, the noise power is concentrating on a few discrete spurs, while the frequencies in between are very quiet.

Paul

Reply to
Paul Keinanen

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