ANNC: Parallel flash programming using boundary-scan

Hi,

For those who interested in programming of parallel NOR flash memories via JTAG/boundary-scan, please have a look at our TopJTAG Flash Programmer software.

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The benefit of using boundary-scan to program flash memories is that there is no dependency on what device is connected to flash memory. It could be any JTAG (IEEE 1149.1) compliant chip, i.e. most CPLDs, FPGAs, microcontrollers, CPUs, etc. There is no dependency on logic inside the chip.

In some cases, for example, when flash is connected to a CPLD, using boundary-scan is the easiest (or the only) option to program the flash.

The disadvantage of boundary-scan method is that it=92s quite slow in comparison to target assisted programming. However, again, it=92s sometimes the easiest or the only option.

Cheers, Sergey Katsyuba

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