When I look at the current data sheet, it says in the selection table that the 7022 only has 13 GPIOs. But I count 16 on the pin out drawing and in the pin list. Any idea why they say there are only 13? Is there some restriction on three of these pins that they can't count them as GPIO? I see that one is a JTAG TRST, one is a BM (boot mode) at power up time and one is a MRST output. These are the only functions I can see that might disqualify an IO as being considered "available", but I the way they are described in the data sheet I expect all of these will work just fine as GPIO. Is this why they count 13 and I count 16?
1 P0.0 2 P0.3 3 P0.4 4 P0.5 5 P0.6 6 P0.7 7 P1.0 8 P1.1 9 P1.2 10 P1.3 11 P1.4 12 P1.5 13 P1.6 14 P1.7 15 P2.0 16 P4.2Unfortunately, I'm not sure even 16 will be enough IOs. They sure seem to burn up a lot of pins on a 40 pin package. 10 are hard dedicated to the ADC/DAC functions, 4 for JTAG and 10 more for power, reset and clock. I guess they wanted to maintain separate IOs for the analog functions to optimize the performance of the ADC/DACs... that is what is supposed to set these chips apart from the other ARM MCUs. :^)