Depending how you look at it, you could claim that it has 64 registers and no RAM. It is a quite orthogonal single address architecture. You can do practically all single operand instructions (like inc/dec, shift/rotate etc.) either in the accumulator but equally well in any of the 64 "registers". For two operand instructions (such as add/sub, and/or etc,), either the source or destination can be in the memory "register".
Both Acc = Acc Op Memory or alternatively Memory = Acc Op Memory are valid.
Thus the accumulator is needed only for two operand instructions, but not for single operand instructions.
What is the difference, you have 64 on chip RAM bytes or 64 single byte on chip registers. The situation would have been different with on-chip registers and off chip RAM, with the memory bottleneck.
Of course, there were odd architectures like the TI 9900 with a set of sixteen 16 bit general purpose register in RAN. The set could be switched fast in interrupts, but slowed down any general purpose register access.
For a stack computer you need a pointer register with preferably autoincrement/decrement support. This processor has indirect access and single instruction increment or decrement support without disturbing the accumulator.Thus not so bad after all for stack computing.