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ZCD with no Dflops

begin 644 CD4000.lib M*B`@1#IW9D9#%]("!SW-P M965D,7T@('1R:7!D=#(]>W1R:7!D=#%](`T*6$E.,B`@0B!":2`@5D1$(%9' M3D0@($-$-#!?24Y?,2`@=F1D,CU[=F1D,7T@('-P965D,CU[W1R:7!D=#%B?0T*6$E.-R`@0C(@0C)I M("!60T,@5D=.1"`@0T0T,%])3E\Q("!V9&0R/7MV9&0Q?2`@W1R:7!D=#%]#0I8 M3U54-B`@439P("!1-B`@(%9$1"!61TY$("!#1#0P7T]55%\Q6"`@=F1D,CU[ M=F1D,7T@W1D,GT-"D%2,"`@ M35)I(#`@("`P(#`@,"`@($U2,&X@(#`@,"`@0E5&("!TW1D,7T@(`T**@T*6$]55"`@66X@62`@5D1$ M(%9'3D0@($-$-#!?3U547S%8("!V9&0R/7MV9&0Q?2!SW-P965D M,7T@('1R:7!D=#(]>W1R:7!D=#%]#0HN96YDW1D-7T-"D$U(#`@3C`P.2`P($XP,#W1D-7T-"D$Q-"`P($XP M,#,@,"!.,#(Q(#`@("`@3C`P-"`P(#`@($%.1"`@=')IW1R:7!D=#)]#0HNW1R:7!D=#%](`T*6$E.-2`@4#$@ M4#%I("`@("`@(%9$1"!61TY$("!#1#0P7TE.7S$@('9D9#(]>W9D9#%]("!S MW-P965D,7T@('1R:7!D=#(]>W1R:7!D=#%](`T*6$E.-B`@4#(@ M4#)I("`@("`@(%9$1"!61TY$("!#1#0P7TE.7S$@('9D9#(]>W9D9#%]("!S MW-P965D,7T@('1R:7!D=#(]>W1R:7!D=#%](`T*6$E.-R`@4#,@ M4#-I("`@("`@(%9$1"!61TY$("!#1#0P7TE.7S$@('9D9#(]>W9D9#%]("!S MW-P965D,7T@('1R:7!D=#(]>W1R:7!D=#%](`T*6$E.."`@4#0@ M4#1I("`@("`@(%9$1"!61TY$("!#1#0P7TE.7S$@('9D9#(]>W9D9#%]("!S MW-P965D,7T@('1R:7!D=#(]>W1R:7!D=#%](`T*6$E..2`@4E-4 M(%)35&D@("`@(%9$1"!61TY$("!#1#0P7TE.7S$@('9D9#(]>W9D9#%]("!S MW-P965D,7T@('1R:7!D=#(]>W1R:7!D=#%]#0HJ#0I853$@(%]# M24YI(%5?1&D@4$5I($-,2VD@4#%I(%`R:2!0,VD@4#1I(%$Q:2!1,FD@43-I M(%$T:2!?0T]55&D@4E-4:2!#1#0U,3!?:2`@=')IW1R:7!D=#%] M('1D,6$]>W1D,7T@=&0R83U[=&0R?0T**@T*6$]55#$@(%$Q:2!1,2`@("`@ M("!61$0@5D=.1"`@0T0T,%]/551?,5@@('9D9#(]>W9D9#%]('-P965D,CU[ MW1R:7!D=#%]#0I83U54,R`@43-I(%$S("`@ M("`@(%9$1"!61TY$("!#1#0P7T]55%\Q6"`@=F1D,CU[=F1D,7T@W1R:7!D=#%]('1D/7MT9#)]#0I!-3

Reply to
John Fields
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Yikes, the PEs are completely asynchronous to the clock. There's all sorts of available pathologies.

--

John Larkin, President Highland Technology Inc

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jlarkin at highlandtechnology dot com

Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators

Reply to
John Larkin 

--
Yup, that's how they're designed to be.
Reply to
John Fields

Clue, like reading the table on the first page of the datasheet? Clue, like looking at the internal logic diagram?

You are violating the setup and hold times specs for both PE and CE inputs, and doing that across cascaded chips to boot. This *will* screw up, and won't take long to do it... just long enough to be a maddening intermittent failure.

Next thing you'll be claiming is that you designed this horrible asynchronous mess on purpose to annoy people.

--

John Larkin, President       Highland Technology Inc
www.highlandtechnology.com   jlarkin at highlandtechnology dot com   

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME  analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Reply to
John Larkin 

--
Yeah, you got it!

That, plus learning to read the 4516 timing diagram on page 3-253
would be a good start.
Reply to
John Fields

Consider this: the comparator output is low, so CE is true into U6. U6 and U2 are happily counting clocks.

Suppose the U6 count is 0xF, and U2 is 0x4. U6 carry out is true (low) into U2. The correct next count would be Ox0 and 0x5, which is 80 counts decimal.

Now let the comparator output go high, so U6 no longer sees a true carry input. But it takes a while before the "don't count" Cout/Cin signal propagates out of U6 into U2. Clock it then. U6 doesn't count, but U2 does. The next state is U6 = 0xF, U2 = 0x5, 95 decimal, which is bad wrong. Classic carry chain error. U9+U7 have the same issue.

It's much worse if you consider what happens *inside* the chips.

Once you do async stuff, and violate the data sheet requirements, all sorts of hazards become possible, and you have to identify them all and prove that none of them will break the logic. That's hard.

--

John Larkin, President       Highland Technology Inc
www.highlandtechnology.com   jlarkin at highlandtechnology dot com   

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME  analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Reply to
John Larkin 

--
True enough, but what you've missed is that what happens with U2 and
U6 when the comparator goes high doesn't matter, since the
comparator's going high generates a high-going pulse out of U3 which
loads the contents of U2 and U6, at that moment, into U9 and U7.

Then, later on, when the comparator goes low again, the carry inputs
of both counters will be enabled, U2 and U6 will start accumulating
new clocks, and U9 and U7 will time out and provide the divide-by-two
pulse at the zero crossings.
Reply to
John Fields

"At that moment?" Wrong yet again. The PE from U3 to U7/U9 is 1.4 us wide, and it's an async DC jam load. When U6 and U2 count wrong, as noted above, the bad count is settled after a typ delay of 200 ns after the clock, and that's what gets loaded into U7/9.

It's a hairball. You don't get hazards like this in a clocked synchronous system.

--

John Larkin, President       Highland Technology Inc
www.highlandtechnology.com   jlarkin at highlandtechnology dot com   

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME  analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Reply to
John Larkin 

--
Apparently, what you've missed is that carry out is synchronous.
Reply to
John Fields

No, it's combinational. Look at the chip schematic.

--

John Larkin, President       Highland Technology Inc
www.highlandtechnology.com   jlarkin at highlandtechnology dot com   

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME  analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Reply to
John Larkin 

--
Just because the PE is 1.4µs wide doesn't mean it takes 1.4µs to snag
the contents of the up counter before they change.

According to the data sheet, the setup time for the data on the jam
inputs is 12ns, and the hold time for PE is 35ns.

When the comparator's output goes high there's a 125ns delay through
U3, and that's when PE for U7 and U9 gets asserted.

Since the Q outputs of U2 and U6 haven't changed yet, the 12ns setup
time spec has been met, and after the 35ns hold time has passed, the
contents of U2 and U6 will have been loaded into U7 and U9.

Since you want the clock to go high when the comparator goes high, and
the delay from clock to Q is 200ns, then that means that the data
present on the outputs of U2 and U6 will be loaded into U7 and U9
160ns after the comparator goes high, which is 40ns before the data on
the outputs of u2 changes.

Here:
          ______________________
U6CI ____|     
         . 250 |_________________
U6CO ____._____|
         .      _________________
CP   ____._____|
         .     .200 .____________
U2Qn ____.__________|
         .125.___________________
U7PE ____.___|
         .   .35.________________
U7LOAD __.______|
Reply to
John Fields

You have broken the synchronous nature of the carry chain - and of the counter's internal logic - by feeding U6 carry in from the asynchronous comparator output, splattering asynchronous levels all over the place. You are doing this just to be peverse, to prove somehow that hairball logic is a good thing. Jim approves.

You are treating the PE inputs of the counters as if they are edge triggered. They are not. If you assert PE for 1.4 microseconds, what gets jammed into U7/U9 is what's at their inputs at the *end* of the

1.4 usec. As I've shown, that can be wrong. You ended your timing diagram *before* the hazard. You are hiding from the hazards because you don't want to see them. Jim approves. 
--

John Larkin, President       Highland Technology Inc
www.highlandtechnology.com   jlarkin at highlandtechnology dot com   

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME  analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Reply to
John Larkin

[snip]

Nope. Jim has no opinion, since I am not a logic designer and never claimed to be.

I do approve of Fields jerking you around, though it's getting tiresome. You are indeed suffering from brachycephalic rectumitis (otherwise known as "with big head up butt" :-), and seem hell-bent to dominate this group, preventing all real circuit discussion... claiming nothing can work but what you scribble (and fail to prove).

So I'm contemplating pulling a Woodgate and giving only advice on the LTspice group where it'll be appreciated.

=============================================================== || || || I'll also be available, when time allows, to help people || || who wish to contact me privately... use the "Envelope" || || symbol on my website. || || || ===============================================================

See! You even go out of your way to prove that you are fully infected with brachycephalic rectumitis (otherwise known as "with big head up butt" :-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

You and JF constantly mention things anal and penile. Enjoy!

--

John Larkin, President       Highland Technology Inc
www.highlandtechnology.com   jlarkin at highlandtechnology dot com   

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME  analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Reply to
John Larkin

I _do_ enjoy you being caught with your head up your own butt, but you no longer exist. Bye. ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

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