Question on zero-crossing circuit

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I've posted a circuit concept you can simulate on 
alt.binaries.schematics.electronic: 

news:7jhcm9tch9suq10a83lg73a2ccciv804dn@4ax.com 

Let me know if you need a circuit description and I'll be happy to 
post it. 

John Fields

Doesn't R4/C5 cause a delay in the time domain?

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Reply in group, but if emailing, add a zero and remove the last word.

Cool, a photon-based OR gate.

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation

For those of you worried (unnecessarily) but such scare tactics as "Most LM339s will do horrible goofy things", please see...

Performed on a transistor-level netlist.

I had to go back and refresh my mind as to which input could give a false logic output. As long as it's only the +IN input that goes below ground, the LM339 won't output false logic. The -IN going below ground will, IF < -Vbe. (Current _will_ be drawn thru the ESD, just limit it with an input resistor.)

I'll give the emperor-with-no-clothes the benefit of the doubt with his statement, "Most LM339s will do horrible goofy things", and chalk it up to old age forgetfulness... only if you take both inputs closer to POSITIVE rail than ~1.4V will you choke off the (common-biased) current mirrors and "... horrible goofy things" will happen. This applies also to the LM324 and all devices in that same structure class.

All of these "anomalies" can easily be understood simply by studying the current mirror structures and what bias "starvations" happen below

-RAIL or close to +RAIL.

Any other questions, simply ask The Master >:-} ... ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
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| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.

...Jim Thompson

-- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at

| 1962 | I love to cook with wine. Sometimes I even put it in the food.

It's a substrate diode problem, not obvious on the comparator "schematic."

What a fathead! Especially so, since you're quite wrong.

I'd rather trust my actual experience with these parts, and the four or five warnings on the National data sheet.

A note from the current online LM339 TI data sheet:

(3) The voltage at EITHER input or common-mode should not be allowed to go negative by more than 0.3 V. The upper end of the commonmode voltage range is V

a proper output state as long as the other input remains in the common-mode range. Either or both inputs can go to 30 V without damage

That seems to be the TI part, probably different silicon from the "National" part, a little tricky since TI acquired National. Whose silicon do they ship?

The 2004 National data sheet has three footnotes that include the same warning. This is one of them:

Note 3: This input current will only exist when the voltage at ANY of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3 VDC(at

Note the double foldover as the input is driven progressively below ground.

Note "ANY of the input leads."

As I recall, on the National 339 and 324, pulling one input below ground can trash all four outputs. On the 324, slaming one opamp rail-to-rail will glitch the other three sections.

I once saved a design by replacing the LM339 with an LF347 opamp, which actually makes a nice medium-speed comparator.

Of course, if you don't connect to the Vcc pin, and only simulate, you won't have any problems.

"The Master"! What a fathead!

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation

[snip]

Duh! Those of us versed in I/C design have models for _each_ of those transistors and its parasitic substrate diode (well).

Now there may exist versions of these parts that take liberties to save Silicon area, and thus do bad things. For instance all 741's are not the same. But 70's version of 339 and 324 did nothing bad below ground except for that phase inversion I pointed out (when driving

-IN). Of course a 324, if fed-back, will lock up.

I'm quite sure I have more hands-on experience with 339's and 324's since I used them extensively in the design of GenRad portable testers between 1977 and 1987.

That's standard datasheet cover-your-ass.

Yep. That's why I mentioned BOTH inputs going high will produce chaos.

DAMAGE id the key word.

That's the -IN effect I showed.

I remain The Master >:-}

Bye ;-) ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.

Let the weaseling begin!

And a 324, as an inverter or a follower, will NOT latch up. You might be thinking about the uA709 or something. The 709 could zener a diff-pair BE junction and lock up. 339 and 324 have high-voltage PNP inputs.

WTF is wrong with you? We're talking about EITHER input going BELOW GROUND!

Wrong. Wrong. EITHER input.

Gonna killfile me yet again? Gonna go and hide for a while?

You need JF to give you mea culpa lessons.

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation

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https://www.youtube.com/watch?v=uI7ni7zL8qU 

John Fields

[snip]

Probably your best bet, then, is to amplify your signal, but clamped. then run thru the zero cross, as in...

But that presents a double-edged sword, you get some phase shift.

I don't know what resolution you really need, or how exotic you really want to get. I once built a circuit that delayed audio so that I could detect a "pop" on the un-delayed signal then have time to stop a track and hold to remove the "pop" ;-)

Caution do not take an input to an LM339 below negative rail without a current-limiting resistor... otherwise the Earth will flip poles and Al Gore will run again for President >:-} ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.