Multiple Input Pull-down

I'm having a bit of a quandary. Since I'm still somewhat of a beginner, I hope somebody more experienced can help me out!

I have three TTL logic chips, with one input on each one all connected together to a single input signal. When that main signal wire is connected to ground, the logic chip signals are all low as expected. When I remove the ground connection though, they seem to all go high on their own without being connected anywhere (aside from to each other). This isn't my problem exactly, but I'm curious if someone can explain it.

So I need a pull-down on that main input signal to keep the inputs it's connected to forced low unless a high is explicitly introduced. The main input signal itself will be connected to a pin coming out of a chip elsewhere, which is switchable between being an input and output. At startup, that pin is an input, so it's not outputting a low like I want, hence the need for a pull-down.

Where the actual problem comes in is that when I add a "normal" pull- down resistor value between the input signal and the ground, it behaves as if it's not connected to ground at all. I've tried a few different ones, from 100k, to 50k (didn't have a 47k), down to 4.7k. I couldn't figure it out. Then finally I tried a 1k, and it seems to properly pull it down low. Keep in mind that this isn't even currently connected to the other chip I mentioned which will default to an input at startup, this is just the input signal being connected to ground or left floating. Is having to use such a low pull-down resistor because I have three inputs connected together? Is there a resistance inside the IC I'm not taking into account when connecting it up like this? My assumption is that a "normal" 10k-47k pulldown value assumes only a single input is being connected to. A possible worry I have though is that the 1k resistor is kind of low and could be wasting power (since it will be able to run from batteries), but I dunno.

I'd appreciate any light anyone can shed on how these things work!

Reply to
FyberOptic
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10K for a normal TTL pull down, but with three inputs involved you might need 1/3 of that or 3.3K

also the TTL thresholds are near grouind so you need to pull harder to go down that you do to go up.

if it's to be battery operated, CMOS might be a better choice than TTL.

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   Jasen
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Reply to
Jasen Betts

It's called floating. The state is usually undefined but because of unknown factors it could set it to either state. That or internally there is a pullup.

(are you sure it's continuously high and not toggling back and forth very rappidly?)

My bet is that there is an internal pullup. By adding your pulldown it works in parallel resulting in a voltage divider.

What is the logic family? (e.g. what is the numbers on the chips)

Some chip families work better than others.

As Jasen mentioned, I'd end up using some form of low power cmos rather than bipolar. You need to choose the right family if you are worried about power loss. Some families are high speed which you might not need.

In any case the cmos families(or equivalents) are usually a direct replacement so there is not that big a deal. (there are a few issues with have to do with thresholds but I doubt you'll have those problems)

If I were you I'd probably look at a few alternatives to bipolar.

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somewhere there is also a chart that shows the power consumption differences.

Reply to
Jon Slaughter

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View in Courier.

One of the gates in a 7400 2-input NAND looks like this, with the inputs
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Reply to
John Fields

More like 330 ohms for classic TTL, 1/3 of that for three in parallel.

10K is OK for CMOS.

A single HCMOS buffer, ideally a Schmitt, in front of his TTL would be a good fix.

John

Reply to
John Larkin

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