Interesting Simulation Problem

Lots of bad-mouthing about simulation of circuits, but here's a real world problem for you...

Suppose you have a circuit made up of 10,000 NMOS and 10,000 PMOS devices plus a few resistors, capacitors and PNP's thrown in to make an ANALOG circuit.

Said ANALOG circuit goes in a medical-implant environment and, to conserve power, it is only turned on periodically, does its task, then goes back to "sleep" for an extended period of time.

During this "sleep" period we want to ensure that only picoamps flow during the "sleep" interval, so we devise various disconnect and shorting devices that make sure everything is turned off.

What is always worrisome to the designer is how to ensure all possible sneak paths are blocked, and that no nodes can FLOAT around and ultimately turn on something by chance (it's really easy to turn on an MOS device if its gate is floating).

So the question... in simulation we hit the "sleep" switch and then check all nodes to make sure nothing is floating.

Visually we can do that in simulation. In PSpice all nodes can be lit up showing the potential on each.

The snag is PEOPLE... how do we make sure we have checked every node?

More particularly, can anyone devise a way that we could automatically find floating nodes?

I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson
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Can't you take the NMOS and PMOS models and incorporate a small current source between gate and source that would normally turn the FET on if the gate was allowed to float?

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Mike Perkins 
Video Solutions Ltd 
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Mike Perkins

I think the answer is to use the built-in gmin node loading, but with a twist... still pondering ;-) ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson

Afterthought. LTSpice RAW files don't just include all the node voltages at every instant, but also all the currents between connected nodes - since nodes are connected by components, these are identified with the components rather than with the nodes.

Any circuit analysis program has to calculate both currents and voltages. They don't have to store them - and you can make LTSpice selective about what it stores - and not everybody stores them in a well-defined and easily searchable format. LTSpice is good like that, and the gEDA programs had the same philosophy.

If Jim searched the currents he'd get the currents he's actually worried about, rather than the floating nodes that make the currents possible.

And my list of possible programming languages should have included LISP. It was - after all - designed as a list-processing language.

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Bill Sloman, Sydney
Reply to
Bill Sloman

Can you run your SPICE file through a perl script or similar that appends a current source to every gate?

Then set the thing to sleep mode, turn all the current sources on, and see if any voltages rise.

Alternately (if the thing isn't already done), build it up with subcircuits that include the current sources that can be turned on.

I don't think you want the current sources on all the time -- that would mess your simulation up at other times -- you just want the current sources on when you're verifying that sleep is really sleep.

Come to think of it -- you want to do a run with each current source turned on INDIVIDUALLY. All 30000 of them. Ho boy -- you are getting paid by the hour, right?

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Tim Wescott 
Wescott Design Services 
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Tim Wescott

The way LTspice performs, I can't imagine it trying 30k nodes.

Jamie

Reply to
Maynard A. Philbrook Jr.

I did indeed think of a script, actually some netlist automation thru UltraEdit.

Instead of current sources I was going to use large value resistors to mid-rail (since all "sleep" devices should have their gates at rail or GND), then I realized that can be automated in Spice... set gmin (a resistor from all nodes to node 0/zero) high, then run the circuit on split rails VDDnew = VDD/2, "GND"=-VDD/2, and look for zero volts.

Pay? Most of the schemes I post here are for my own edification... just had the problem come up in a small cell, maybe a few hundred nodes, voltages easily observable all at once; but then I got to fretting ;-) ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson

It's hard to imagine an analog circuit that needs 20,000 transistors.

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John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
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John Larkin

It's a system... aka SOC. But I acknowledge that's well beyond your mental capability >:-} ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson

It's like the windows OS, layer ontop of layer.

Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard!

Jamie

Reply to
Maynard A. Philbrook Jr.

Unless it has a thousand wirebonds, what can all those analog transistors do?

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    
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John Larkin

Jamie/Maynard, Displaying his fundamental ignorance. ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson

I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson

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The way _you_ perform makes it difficult to see you imagining it 
trying three nodes. 
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Reply to
John Fields

You're having trouble modeling a neon bulb, too.

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    
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John Larkin

Nope. You missed it. As usual >:-} ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Reply to
Jim Thompson

Last I saw, it was ohmic in the low uA range.

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    
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John Larkin

...snip...

Nope. You missed it. As usual >:-} ...Jim Thompson

Just curious. How often has simulation revealed something, you didn't already know, or suspect?

Reason for my question, when I first started Engineering, my mentor looked over my shoulder at my several pages of equations and laughed uproariously. He said, you'll get lost in all those equations. Instead use these simple models, then when you know what you have, verify with those lengthy equations. He was right. Thus today, rarely, if ever, does the simulation do anything but verify.

Reply to
RobertMacy

In his case? Every project. He designs bugs in and simulates them out. Most programmers work that way, too.

Good point. Jim says he has a 20,000 transistor analog CMOS circuit. It has to be low standby power, so he's trying to figure out how to use Spice to find floating nodes.

Why didn't he design it to not have floating nodes? Does he not understand his own design?

Or someone else designed it, in which case he still doesn't understand it.

Analysis, either mathematical or using a simulator, is a poor replacement for design and understanding.

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    
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John Larkin

Not very often. Occasionally it reveals a latch-up/lock-up I didn't anticipate. And virtually _all_ CMOS OpAmps require simulation to get the loopgain compensation correct... the Level=3 school boy equations (the only ones hand-tractable) don't even do a good job at gain prediction.

Yep. That's what I've attempted to convey... design with your head, then verify via simulation.

The neon bulb modeling exercise was just to prove to myself that I could create a model for a very abrupt slope change while maintaining finite derivatives. Otherwise I have no use for a neon bulb... haven't used one in a circuit for probably 50 years. ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson

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