Hello,
I've been doing some reading on metastability of flip flops when you have inputs that are asynchronous or coming from a different clock domain.
My question pertains to flip flops on the same clock domain. Suppose I have a pair of rising edge D flip flops with the D line of one going to the Q line of another. On the rising edge of the clock, the first flip flop changes its state and output goes from low to high. At the same rising edge, the second flip flop's input seems to violate the hold time, right? We were low for nearly an entire cycle, then at right after the rising edge the input changed.
Why do a pair of flip flops on the same clock domain not run into metastability issues? Obviously I'm missing something here because stuff like this is used all the time without problems.
Thanks for the help.