"PIC Hammer" schreef in bericht news:go1bbk$ot0$ snipped-for-privacy@aioe.org...
Hmm... He who can handle only a hammer, considers every problem to be a nail :)
You left out the most important part: The program.
It was mentioned before: "If you offer a PIC-solution then provide the program as well."
*I* would use a 10F200 for a fixed timer and a 10F222 for a variable one. The OP however has neither electronics design - nor programming skills. Even if you provided a program I doubt he could get it into the chip. One still needs a programmer and the know-how to handle it.
A 555 would be my second choice but I also could make something using discretes. If you consider yourself to be a designer, you'll need to have more then one tool in your box.
Neither do real analog designers. It's almost a daily exercise for me converting device libraries to upper case so I can tell 1's an l's apart. UNIX people seem to be particularly jerky about lower case ;-)
...Jim Thompson
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It\'s what you learn, after you know it all, that counts.
Well... if the supply voltage is a reasonable value for driving the relay, say between 8V and 12V, one could consider turning the
100K pullup into a voltage divider that would float the trigger just above its threshold. Say a 120K/68K split. That would put the trigger voltage at about 0.36*Vcc . The 1.4V pulse should then be sufficient to drop it below the 0.3*Vcc threshold.
Only if you think being exposed to hardware that balances competing needs well is evil. It's how things sometimes get done even in well done achievements of balancing contending issues. I just worry about what meets the need well and actually feel impressed when a crafted and intelligent balance is successfully struck -- even if it means there happens to be some software issues added to the pile. The converse of that simply sweeps the software burden inordinately onto hardware designers and I tend to enjoy seeing a balance of weight placed on both sides of the fence.
Time have changed some and it's less work to design smaller micros without the bank switching hardware. But it had its place and still does to a degree not only with the PIC but also with the Intel x86 family, as well -- even the newest ones include banks everywhere; segment descriptor tables, which are themselves "banked" by other registers that locate them; page table "banks"; and so on. Advantages are to be used. DSPs have their own contributions here, in spades. And so on.
But some of my fondest memories are in getting an operating system working on a bank-switched z80-based system. ;) Been there, not afraid of it. And yes, I like unbanked systems, too. Everything is good.
lower case is more readable because the letters are not all boxy-like- they have some bits wot go above the base line and some wot go above the others. The envelope of the word can be enough to allow it to be recognized.
Best regards, Spehro Pefhany
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; THE HITLOCK MECHANISM ENFORCES A MINIMUM IRQ-TO-IRQ DELAY SO THAT, IF A USER ; TRIGGERS US AT TOO HIGH A RATE, WE DON'T HOG ALL THE CYCLES FROM THE OPERATE SIDE.
; ON ENTRY, FAIM NAMES THE FRAME JUST FIRED ; FSTATE IS + LIVE, 0 DEAD, - DONE ; FOX IS OUR IRQ DOWN-COUNTER
; THE SETUP CODE PUSHES FRAMES FA AND FA+1 INTO THE FPGA, SO THE FIRST FRAME THAT WE ; UNLOAD IS ACTUALLY FA+2. WE DO THIS EVEN IF IT WILL NEVER BE USED.
; EXECUTION TIME = 38 USEC. ; EXPERIMENT HAS SHOWN THAT THIS ISN'T WORTH CACHING.
TST.W FSTATE.W ; CHECK FRAME MACHINE STATE BLE.S UVOFF ; IF DEAD OR DONE, SHUT DOWN.
SUBQ.W # 1, FOX.W ; TOCK IRQ COUNTER BPL.S UVRUN ; ANY LEFT? IF SO, LOAD ANOTHER FRAME
; FOX HAS DECREMENTED TO -1, SO SHUT DOWN THE SYSTEM...
MOVE.W # -1, FSTATE.W ; SET STATE = DONE BRA.S UVOFF ; AND SHUT DOWN.
; ON NEXT-TO-LAST IRQ, FOX IS ZERO, AND IN THAT CASE WE DON'T WANT TO ; AUTOMATICALLY RE-ARM THE HITLOCK TIMER AT THE NEXT IRQ.
UVRUN: SGT.B FDIE.W ; THAT DOES IT!
MOVE.W FAIM.W, D0 ; FETCH FRAME POINTER ADDQ.W # 1, D0 ; BUMP SAME AND.W FLAST.W, D0 ; MOD TABLE SIZE MOVE.W D0, FAIM.W ; AND REPLACE
ADDQ.W # 1, D0 ; LOAD NEXT FRESH FRAME INTO THE PIPELINE BSR.S FRAGG ; EVEN IF IT MAY NEVER BE USED (LIKE, 1 OR 2 SHOTS)
ST.B FIRQ.W ; ALLOW MORE IRQ6 THINGS BRA.S UVEX ; AND BAIL
; SHUT THINGS DOWN... THE HITLOCK IS STILL ACTIVE, AND WE HAVE NOT AUTHORIZED ANOTHER ; SHOT, SO TRIGGERS ARE DISABLED. THE USER MUST SAY "FRAME OFF" OR "FRAME GO" TO FIX THIS.
I didn't realise that the dollar had fallen quite that far:
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£25.03 (ex VAT); add another tenner if you want the demo board.
It took me ~4 hours from opening the package to finishing and understanding the lessons.
Of course, it will take a bit longer if you've never programmed asm before, but not 6 months. In fact, if it takes 6 days, you're probably not cut out for a technical hobby.
; The HITLOCK mechanism enforces a minimum irq-to-irq delay so ; that, if a user triggers us at too high a rate, we don't hog ; all the cycles from the operate side.
; On entry, FAIM names the frame just fired ; FSTATE is + LIVE, 0 DEAD, - DONE ; FOX is our IRQ down-counter
; The setup code pushes frames FA AND FA+1 into the FPGA, so the ; first frame that we unload is actually FA+2. We do this even ; if it will never be used.
; EXECUTION TIME = 38 uSEC. ; Experiment has shown that this isn't worth caching.
TST.W FSTATE.W ; Check frame machine state. BLE.S UVOFF ; IF DEAD or DONE, SHUT DOWN.
SUBQ.W # 1, FOX.W ; tock IRQ counter. BPL.S UVRUN ; Any left? IF so, load ; another frame.
; FOX has decremented to -1, so SHUT DOWN the system...
MOVE.W # -1, FSTATE.W ; Set STATE = DONE, BRA.S UVOFF ; and SHUT DOWN.
; On next-to-last IRQ, FOX is zero, and in that case we don't ; want to automatically re-arm the HITLOCK TIMER at the next ; IRQ.
UVRUN: SGT.B FDIE.W ; That does it!
MOVE.W FAIM.W, D0 ; Fetch frame pointer ADDQ.W # 1, D0 ; Bump same AND.W FLAST.W, D0 ; MOD TABLE SIZE, MOVE.W D0, FAIM.W ; and replace.
ADDQ.W # 1, D0 ; Load next fresh frame into ; the pipeline, BSR.S FRAGG ; even if it may never be used ; (like, 1 or 2 shots).
ST.B FIRQ.W ; allow more IRQ6 things, BRA.S UVEX ; and bail.
; Shut things down... the HITLOCK is still active, and we have ; not authorized another shot, so triggers are disabled. The ; user must say "FRAME OFF" or "FRAME GO" to fix this.
Well, I got a bit sidetracked (by an phantom button press, which appears to be an artifact of RA3 being used both for the pushbutton and for programming), but the following works (admittedly, a 16F690 is overkill for this, but that's what's in the socket right now).
the 555 timer (low power versions are now readily available too) is the classic way to do it precisely with few extra components, the uC
+MosFET is another interesting way, especially if you would like extra functionality and already have a uC programming setup. The direct extension of your initial method is a transistor to buffer the RC timing circuit and let you use a smaller capacitor, however the slow turn off problem will remain, and the component count is not less than the other two methods.
In either case so *do not forget* the R/C/D snubber circuit (typcally about 100ohms in series with 100nF, plus a 1A diode in parallel or some resistor series combination) unless you are really certain that they can be omitted in this case. The snubber circuit will protect both your own circuit, and others. Inductive relay circuits often work on their own without them, however they are now substantial radio frequency generators and will can stop other circuits/devices from working when placed in proximity, even a device that is not introduced to the room until years later.
the 555 timer (low power versions are now readily available too) is the classic way to do it precisely with few extra components, the uC
+MosFET is another interesting way, especially if you would like extra functionality and already have a uC programming setup. The direct extension of your initial method is a transistor to buffer the RC timing circuit and let you use a smaller capacitor, however the slow turn off problem will remain, and the component count is not less than the other two methods.
In either case *do not forget* the R/C/D snubber circuit (typically about 100ohms in series with 100nF, plus a 1A diode in parallel or some resistor series combination, as close to the relay coil as is practical) unless you are really certain that they can be omitted in this case.
The snubber circuit will protect both your own circuit, and others. Inductive relay circuits often work on their own without them, however they are now substantial radio frequency generators and can stop other circuits/devices from working when connected or placed in proximity, even a device that is not introduced to the room until years later.
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