Utility of copper pours on four-layer boards

I'm trying to figure out where the not-so-uncommon practice of flooding the top and bottom layers of a four (or greater) layer boards (where the inner layers are power and ground) comes from. I'm often having to get our techs to widen the clearance between the copper pours and controlled impedance traces because they like to set the clearance from the copper pour to the other signal nets so tightly (e.g., 6mils) that they end up turning microstrip lines into coplanar waveguides and significantly altering their impedances. It occurred to me that rather than continually dealing with this (they always use copper pours by default), it might be easier to just tell them not to use a copper pour on the top or bottom layers at all since I can't think of any particularly compelling reasons to do so in the first place (and they say they're doing it by default because it's "common practice" and "their personal preference"). The benefits of a top or bottom layer ground pour on a four-layer board that I can think of are...

-- Certainly you could use it as a nice bit of heatsinking if you have power components elsewhere that connect to the plane layers

-- At low enough frequencies, you probably get slightly better shielding from outside interferers or for crosstalk. At high enough frequencies, this can of course come back and actually create greater interference if you haved "nailed down" (viaed) the copper pour to ground at regular intervals (due to resonances, e.g., an isolated copper pour with no grounding at all looking like a pretty good patch antenna).

Am I missing something here?

---Joel

Reply to
Joel Koltner
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The board houses have never objected to no copper pour? :-) But I appreciate the point; I do imagine that if we purchasing very large quantities the board houses might shave a skosh off the price for having them.

Mmm... to me I guess that, unless you don't have a solder mask, I don't really notice much different aesthetically.

Those are the ones I'm interested in. My suspicion is that this is a holdover from 2-layer boards where the copper pours were proxy for proper plane layers and was just carried over to 4+ layer boards.

Thanks for your input,

---Joel

Reply to
Joel Koltner

I can't think of any reason to always pour surface layers. Tell them to quit doing that.

I disagree that it's "common practice." I rarely see this, and never do it.

John

Reply to
John Larkin

Sure, but if there isn't any significant electrical advantage, it's a lot easier for me to tell them, "Don't use a pour, period..." rather than doing a bit of airthmetic, asking for a particular clearance, and then having to argue with them over whether it should be, say, 10mils (what they want) or 12mils (what I want).

Reply to
Joel Koltner

Tends to be much easier to etch(less copper to remove), it looks nicer, and does have some electrical uses(remember reading about it but forgot the details). I'm sure there are other reasons too.

Reply to
Jon Slaughter

BTW, you should be able to set the clearance to whatever you want. In Altium you draw the bounding region of the pours over the circuit and it figures out how to pour it with the appropriate clearance. If you need more room it shouldn't be an issue, just tell them how much clearance you want and it shouldn't be an issue. (take 10s to change)

Reply to
Jon Slaughter

Perhaps it should be, "not uncommon?" Anyway, thanks for the comments -- I respect your design capabilities John and it's clear you have a good mind for what works and what doesn't. (I probably spent too long in school as I seem to often be overly conservative when it comes to such matters. Although I'm not as bad as one professor I had for a microwaves class where who was cautioning a student who'd designed a ~3GHz stripline filter that moving his input or output SMA connectors even a millimeter off-center from the microstrip would "very significantly" affect the board's response... :-( )

---Joel

Reply to
Joel Koltner

It provides some isolation between areas across from the pour. Or in RF speak stuff "talks less". It's also an additional free capacitor if over the VCC plane. Then there is the etching process. Less to tech away, less to recycle. Although with today's copper price trend that could become different soon ;-)

Also, it lets you sneak a hidden yet well shielded trace underneath, by cannibalizing a bit of the real GND plane or VCC. Just dunnit. Shhht ... nobody can see it :-)

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

I'm guessing that the pour can help get the copper coverage more even and symmetric, helping to get a more even etch, plating etc. and prevent the board from warping when heated during solder.

-Lasse

Reply to
langwadt

I fail to see how a "do not pour" order will not result in an argument but a "make the clearance 12 mils" order will. I think that the decision should be made for other reasons, not decided by what minimizes argument.

For example, I often make PWBs with three signal/power layers and one ground plane layer. I often flood the power using the

+5V +15V and -15V power traces as seeds for the flood. and I leave a hefty clearance oround the floods. This has the effect of making the power traces heavier where there is room and the standard width where there isn't.

Another aspect to consider is that the more copper you etch off, the quicker the etching solution gets saturated. I have always wondered wether they can recover that copper and sell it at a profit, but if this wenbsite is any indication... [

formatting link
] ...the less copper you etch off the less it costs them and the better it is for the environment.

--
misc.business.product-dev: a Usenet newsgroup 
about the Business of Product Development.
     -- Guy Macon
Reply to
Guy Macon

Crazy... a professor who can't compute a wavelength.

At 3 GHz, BNC connectors still work.

I just did a 4-layer FR4 board, and included a test trace: thru-hole SMA, 50 ohm traces on layers 1, 3, and 4 (2 is ground), then another SMA. I included a couple of sharp right angles and a beveled corner. All the bends are invisible on 20 GHz TDR. The vias do show up, but not real bad.

John

Reply to
John Larkin

Yeah, good point certainly... I wonder if I've ever "accidentally" benefitted from this?

OK.

:-)

That does seem to be the best approach if you actually need lots of shielding, although I've seen people shy away from it since it's of course that much harder to probe.

Some years ago I was talking with a guy at a testing lab and he said they did have one customer who would first make their engineering prototype boards the "usual" way and then, once everything was working, re-spin them with power and ground on the outside layers and signal layers on the inside.

Thanks Joerg,

---Joel

Reply to
Joel Koltner

It's one argument (period) rather than one argument per board, where the numbers change based on size of the board, impedances, layers, etc. :-)

In the ideal world, yes.

---Joel

Reply to
Joel Koltner

In academia I think what happens is that if you haven't actually sat down and thoroughly analyzed the situation and published a paper about it, you often tend to err on the side of cuation and assume that any small change may have some huge impact even if some quick "thought experiments" like calculating the wavelength don't immediately suggest otherwise. (I once worked at a place where we had an Asian software engineer -- English as a second language for him -- who couldn't quite describe the problem with some code he was looking at, but turned to me and another guy and told us it was, "some kind of dangerous." It's become a popular phrase since then... hence I think the professor felt that moving the SMA connector was some kind of dangerous. :-) )

Of course there are plenty of "hands-on" professors in academia too, although their numbers seem to be dwindling as electronics becomes a "deeper" field and people specialize early on and many end up having never built a circuit outside of a simulator.

Good information. I think the beveled corners are meant to tell others that you're an Official Microwave Designer and not just a PCB layout hacker. :-)

---Joel

Reply to
Joel Koltner
[...]

You can still probe at both ends, where the parts are. Something has to connect to that trace.

For penny-pincher designs it's about the only way to make baluns, inductors and stuff without needing a shielded enclosure and still pass class B. GND fills on the outer layers, flat coils on the inner ones. It can also make it rather impossible for copycats to understand the circuit unless they have a schematic or grind the layers down.

It eases emissions but I rarely do that for complete boards. It makes rework almost impossible. But it looks cool.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

Hmm, for some reason John's post didn't make it onto the Pacific Bell news server. Strange. So if I don't respond to some stuff my apologies, I might not be able to see all the posts.

WRT beveled or rounded traces it depends on the effective number of bits of the TDR scope. Minute reflections may go under in the noise but they sure can matter in some hot pulse-echo applications. Rounded traces have the additional advantage of better ruggedness if the circuit board is exposed to lots of flexing. Pretty much all the trace cracks that I've seen over my career started either at some sharp corner or at an abrupt jump in trace width. The same goes for overload burn-outs.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

Hence the one engineering/debug spin the usual way.

Not that I'd expect *your* designs to need much rework anyway, Joerg. :-)

Have a good evening!

---Joel

Reply to
Joel Koltner

Many clients are hoping to be able to use the first cut for a while and pass EMC with it.

Thanks for the compliments but we all make mistakes. Only one guy never did and he was hanged.

Same to you. Tonight will be a rare occasion where we'll watch TV, "Dancing with the Stars".

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

Almost all of my designs are power products, and I do it to maximise the heatsinking ability of the PCB. As well as Joergs points.

Cheers Terry

Reply to
Terry Given

Of course, rounding the corners instead would tell them that you're an Official Rubylith Hacker. ;)

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

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