Using 4000 series logic to drive....?

I've been encountering that mentality since the early-mid 80s!

I found it to be a good and fast way of weeding out completely uninteresting job applicants.

Both Xilinx and Intel / Altera have already announced FPGAs with embedded DRAM. Google for "FPGA HBM". It's not monolithic, but the bandwidth is vastly superior than anything that could be achieved by going off package to regular DDR4, etc.

It's also very expensive.

Allan

Don't get me wrong, I like working with embedded processors and have used them in stuff before. But I think using them to "emulate" the behavior of logic when it's clear a task can be done using _the logic itself_ can be a false economy.

Nowadays in any application that involves what a digital computer _does_ at a brass-tacks level - take data from the outside world, store it, process it, and then spit it back out, a uP will win hands down. i.e. they're the go-to choice when what you need is "data processing." That's a lot of applications, but not everything needs "data processing."

Also another area they'd be the natural choice is when you're doing any task but are working with an extremely limited power budget and can leverage sleep modes, etc. to that advantage.

Anyway in case anyone's curious the final resolution to the situation was feeding the wimpy-sluggish edged external pulses from the 4011 through a 74HC14. The 74HC04 seemed to work better but there were still occasional misfires, but the schmitt action of the 'HC14 cleaned it up real nice.

Driving a 74LS14 from the other point on the circuit where the inverted signal is "buffered" by a transistor with a 10k collector load, from the collector, also worked, but as expected an LS alone would not reliably trigger from a 4000-series output.

That's comforting--another safeguard against any momentary insanity on my part. ;)

I use micros a fair amount myself, just not in everything.

Cheers

Phil Hobbs

LS will barely trigger reliably from LS. ;)

Seriously, HC is so much superior that I haven't used an LS part in probably 25 years, even in a proto.

Cheers

Phil Hobbs

Ya, I decided to build a proto in this instance for exactly the reason that I have to interface with some external clocks and I wasn't sure how it was gonna go. I like using LS for prototyping because a) I don't have to take as much care with handling and b) I inherited a huge stock of the parts with almost every part number in the 74 series represented.

The latest date codes are around '86. So far I haven't come across a single part that didn't work straight out of the bin, even the earliest date code 74LS00 from around 1976, in a very antique-looking plastic package.

Everything "real" here will likely be done with HC, though. I haven't used LVC before but I'm going to give that a try when I can use lower voltage rails. In this case I have no supply under 5 volts available without adding an additional regulator.

Ah so. I can see that being an inducement. I has a less extensive but still largish collection of LS, S, and F TTL that I chucked out some years back because I was sure I'd never use them. I keep DIP-packaged CD4000 and HC lo gic in stock for dead-bugging one-offs.

(BTW it's weird agreeing with you about something. Maybe there's hope.)

Cheers

Phil Hobbs

Another way of getting good timing coherence is with a smallish CPLD. Partl y to begin learning Verilog, a few years ago I did an interesting signal pr ocessing block that I call a boxcar lock-in. Using CMOS muxes, it computes the average value of a demodulated AC input signal over 1

I've given up worrying about my insanity, and decided to embrace it :) That's my story, and I'm sticking to it.

Precisely. By and large "one trick ponies" tend to be boring, and not to understand the underlying fundamental principles.

I have. I threw together a wirewrapped 4 decade counter, partly to show youngsters some interesting construction techniques, but mainly to ram home that signal integrity needs to be considered.

"Design by junk box" in a very pure form :)

But I'm surprised that I'm still using the kynar wirewrap wire I bought (gulp) ~40 years ago, for manhattan (etc) one-offs.

Allan Herriman wrote on 8/2/2017 7:13 AM:

Interesting that X and A are fighting tooth and nail to avoid becoming makers of commodity devices. Over a decade ago I tried to make the point with representatives of X that a future product should include the equivalent of an MCU, a small CPU, RAM, Flash and a small to moderate FPGA. The response was a million reasons why that would not be practical. Now they are in essence doing just that except the way they are doing it shows their real concern. They don't want to be competing at the low end with the makers of MCUs. They are targeting the high end with large fast CPUs and now large DRAM memories.

That likely suits their main customers, the comm companies. But they ignore the many other markets where they could sell millions and maybe even billions of chips, but at lower margins. With only three or four vendors in the market, selling commodity parts can be very profitable. Lattice is definitely headed down that road and Microsemi is working toward that as well.

--

Rick C

In reality programmable devices are the obvious go-to approach unless there is some clear requirement that dictates hard, fast logic chips. Your design isn't one of those.

You can slice it any way you want, but it's still the same dish.

--

Rick C

I'm perfectly happy with my somewhat-left-of-center politics and life is pretty good one average so I don't see a whole lot of reason to change, if that's what you're saying. ;-)

I'm doing my best for the moment to avoid the apocalyptic histrionics of both the American far left and right. "Never wrestle with a pig, you just get dirty, and besides, the pig kinda likes it" - a quote apocryphally ascribed to Bertrand Russell

I'd like to get into using those at some point, is there a modern CPLD family that you'd recommend? I know some VHDL but it's rusty, never used for anything outside of "academic exercises"

I kind of like the Xilinx XC9500XL family. The boxcar lock-in uses an XC9572XL-10VQG44C, which has 72 macrocells costs about $3. It has

5V-tolerant inputs, which is convenient, and has 3.3V I/O, which is enough to switch small FETs adequately and so on.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net

5 volt tolerant I/O is not only useful it is extremely rare in the PLD community. I haven't heard anything specific, but the XC9500 line is getting very old. I'll be surprised if it lasts another 5 years.

I would recommend looking into some of the Lattice parts like the XO2/XO3 lines. Or if you are interested in very low cost/power devices the various ice40 devices are very interesting. The ice40 parts are from SiliconBlue who Lattice bought and so still use separate tools from the rest of the Lattice line. But the bitstream has been reverse engineered so there is an open source toolset that handles the full gamut from compiling the source code to downloading the PLD.

I would say that one nice thing about using PLDs is that 99.9% of the time you don't need to optimize code or tweak compilation. If I am worried about them I spend a little time with lower level functions to see how they compile. The only time this is typically an issue is when I want to use the carry chain to detect the zero count on a down counter or once in a while with a wide logic function. I code it as a module and look at the resulting logic in the synthesis viewer to make sure I didn't muck it up. It has to be pretty ugly to require fixing, partly because it is a PITA to do much with the code that is guaranteed not to be broken by higher level code. For the most part I try to code so I just won't need to optimize anything (keeping logic small between registers) and recommend others do the same.

--

Rick C

The 9500XLs are newer ones than the old plain 9500s, which were discontinued a couple of years ago, so you may well be right.

Having to go to lower I/O voltages reduces their utility quite a lot.

The Lattice ispMACH 4000V series are also 5-V tolerant, a bit newer, and quite a bit speedier.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net