Another jellybean logic implementation question: I have a circuit where I'd like to to count some pulses coming out of a 4000 series IC (4011B) operating at 6 volts into a '163-type counter and am running into problems with the interfacing.
The 4011 output in question is already fanned out into into 2 other 4000 series CMOS gates and is putting out 10% duty cycle positive-going pulses at around 5-50Hz depending.
I'm waiting on some HC and LVC parts to come in but I was just testing the prototype hack with what I've got on hand and have got problems. A
74LS163 doesn't count at all when receiving its clock input from the output pulses of this gate, but depending on where one gets one's info from a 4000 series gate doesn't have sufficient drive current for an LS input, and at 6 volts I'm violating the max Vcc spec for LS logic, anyway.A 74HCT163 socketed in the same seems to "mostly work" in this arrangement with a 6 volt supply, the two MSBs look OK on the scope, but the two LSBs are behaving strangely; they look like they have both a low frequency 50% duty cycle square plus 10% duty cycle pulses superimposed on each other.
I have another 74HCT163 lashed up in what looks like exactly the same way on another protoboard getting fed a 6 volt 50% duty cycle low frequency square and everything works fine, so I'm trying to figure whether I'm making an interfacing/fanout error, layout error, or maybe the duty cycle is the problem. AFAIK the test board ICs are bypassed well enough and I don't see any disturbances on the supply rail during the transitions.