Using 4000 series logic to drive....?

Another jellybean logic implementation question: I have a circuit where I'd like to to count some pulses coming out of a 4000 series IC (4011B) operating at 6 volts into a '163-type counter and am running into problems with the interfacing.

The 4011 output in question is already fanned out into into 2 other 4000 series CMOS gates and is putting out 10% duty cycle positive-going pulses at around 5-50Hz depending.

I'm waiting on some HC and LVC parts to come in but I was just testing the prototype hack with what I've got on hand and have got problems. A

74LS163 doesn't count at all when receiving its clock input from the output pulses of this gate, but depending on where one gets one's info from a 4000 series gate doesn't have sufficient drive current for an LS input, and at 6 volts I'm violating the max Vcc spec for LS logic, anyway.

A 74HCT163 socketed in the same seems to "mostly work" in this arrangement with a 6 volt supply, the two MSBs look OK on the scope, but the two LSBs are behaving strangely; they look like they have both a low frequency 50% duty cycle square plus 10% duty cycle pulses superimposed on each other.

I have another 74HCT163 lashed up in what looks like exactly the same way on another protoboard getting fed a 6 volt 50% duty cycle low frequency square and everything works fine, so I'm trying to figure whether I'm making an interfacing/fanout error, layout error, or maybe the duty cycle is the problem. AFAIK the test board ICs are bypassed well enough and I don't see any disturbances on the supply rail during the transitions.

Reply to
bitrex
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bitrex wrote on 7/28/2017 12:34 PM:

Have you scoped the input to the LS163?

Can you view them in relation to the clock input? Have you looked at the clock input? Try posting a picture of the clock input and the LSB output on the same scope display.

There is no reason why the duty cycle would be a factor. Is there a reason why you can't lower the power voltage to 5 volts? With HCT there shouldn't be an issue with fan out.

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Rick C
Reply to
rickman

Maybe stick some HC buffer after the 4000 series? Are there schmitt trigger inputs anywhere.. maybe edges are too slow??

George (not a digital guy) H.

Reply to
George Herold

4000 series chips have slow, wimpy drive. The edges may not be fast enough for clean drive of LS or HCT. And HCT counter could mis-count if given a slow clock edge, even if the voltage swing were right.

An HC14-type schmitt gate would clean things up.

Those plastic plug-in proto boards are not very good for fast logic. They are not very good for anything! We don't allow them here.

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John Larkin         Highland Technology, Inc 
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Reply to
John Larkin

According to Don Lancaster (TTL Cookbook) CMOS can directly drive low-power TTL (LS) assuming both are on 5V - why are you running at

6VDC? TTL doesn't like higher voltages and glitches to hell and gone...

TI's Designing with TTL Integrated Circuits also points out how the Voltage Transfer Characteristics (Vi input voltage of 08 2.0V) for

74XX logic are only valid between 4.75 5.25VDC. 54XX logic is valid between 4.5 5.5VDC.

You may want to buffer the output(s) if you get Vcc down below 5.25VDC and it still doesn't work properly.

Yes, and why do you expect it to work properly???

I service a lot of TTL interface logic and rarely see reliable operation above 5.5VDC.

John :-#)#

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Reply to
John Robertson

None of that garbage here, this "prototype" is at least done somewhat properly on a sheet of through-hole blob-board with solid bypassing

Reply to
bitrex

Yup, looks fine.

Indeed, will do when I have a minute...

I didn't think so, just checking.

No, I should be able to do that, but the circuit I'm modifying runs everything, both analog and digital, off a single set of four AA batteries. The analog section doesn't work properly if the supply is at

5 volts, so at the moment I'm just running everything, the original board and the test rig off 6 coming from a bench supply. No reason I can't run the add-on board at a lower voltage, I just don't have any appropriate LDOs or switcher breakout board-thingies on hand at the moment.
Reply to
bitrex

How about a diode or two? (no three terminal volt regulators in your parts bin?)

GH

Reply to
George Herold

It's probably just a rise/fall time issue with the 4011 output. Perhaps just buffer it with a stage (or two) of 74HC04 to square up the edges? ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Reply to
Jim Thompson

I think I'd sort out the power issues first. Alkalines start at 1.55v and end at 0.8-0.9v. If your analogue section can't run on 5v you've got a problem there.

NT

Reply to
tabbypurr

Do you have power supply decoupling caps on the HC163 chip? It really needs that. It may be double counting or something, causing the LSBs to look wrong. Is the ground between the LS163 and the CMOS parts short and robust? A couple ns glitch or reflection on the clock line is all it would take to make the HC163 do odd things.

Jon

Reply to
Jon Elson

If they weren't good for something, you'd never need to disallow them, would you?

Every student that has to wire up something in a lab, can get the job done inside an hour if they have the right tools. Which doesn't mean a soldering station, it means a proto-board. Adjacent-pin capacitance is just a part of the learning experience!

Reply to
whit3rd

Funny, but I thought we were discussing logic.

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John Larkin         Highland Technology, Inc 
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Reply to
John Larkin

Intermittent connections, parasitic oscillations due to stray inductance and capacitance, no way to use effective bypassing, noise pickup due to long traces, broken leads due to multiple insertions, intermittent shorts when wires and leads contact each other, broken connections when leads and wires fall out due to worn connections, difficulty hooking up oscilloscope probes, ringing due to poor grounds. Waste time trying to troubleshoot instead of learning how the circuit works.

Test their resolve. Dump it on them all at once. Watch them switch to computer science.

What's the alternative? With today's fast logic and faster transistors, I don't see any realistic proto build process except to use Manhattan style on a copperclad ground plane or something similar. Teach them about soldering technique, short leads, scope probe grounding, bypassing, and good RF techniques that are needed for a successful job. They have to learn it sooner or later, why not start at the beginning?

They also get to keep their prototype for the next class, where they can add to the circuit for more advanced work.

There are tons of Youtube videos on these techniques they can watch for homework assignments.

Reply to
Steve Wilson

I'm not sure what logic class you would be teaching that requires hand wiring circuits. If you want to teach logic, teach logic. Show them how Karnaugh maps work and how they graphically permit optimization of simple functions (up to four variables). Then show them the algorithms that will be performing those optimizations for every design they are at all likely to work on in FPGAs. Then let them design logic the way logic *is* designed today, in HDL and let them learn how to test their designs on FPGA eval boards.

If you want to teach prototyping techniques, then you will be teaching at a trade school.

If you want to teach signal integrity techniques, well, I don't know where that would fit in. For whatever reason they just don't teach that in college, or at least they didn't when I was there. I remember one professor in a logic design class mentioned that the signals look terrible compared to the logic waveforms drawn on the board, but that they worked anyway. lol I don't know that he ever picked up a data sheet. I know I didn't know how to use one until I learned on the job and we were mixing logic families. SI was something I picked up some three or four jobs later when it became a common topic in the trade journals.

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Rick C
Reply to
rickman

Yep, this was it (as others mentioned too.) The 4011B on the board seems to just pull up too wimpy to drive the input of an HCT reliably, particularly when it's fanned out to a couple other 4000 series gates already. Out from another spot on the board where the inverse signal is "buffered" and inverted by a CE transistor with a 10k ccollector load - also too wimpy. A 74HC04 or CMOS 555 used as a Schmitt seems to trigger it OK.

I don't have any 74HC163s on hand so I'll be interested to see if they need buffering, too. It looks like there's a bunch of extra "stuff" in the HCT input circuit prior to the actual logic to accomplish the (unrequired here) level-shifting:

Reply to
bitrex

Through hole blob board with IC sockets, a 0.1uF capacitor right at the top with a thick solder "run" connecting its leads directly to Vcc/Vdd and ground, and short runs of fine ~28 gauge insulated silver wire making the interconnects on the underside has usually worked pretty great for me, at least up to a couple MHz.

Reply to
bitrex

whit3rd... another of the "head roar" crowd ?>:-} ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Reply to
Jim Thompson

Perfboard is definitely better than those stupid nylon things, but far infe rior to dead-bug construction. With good lead trim, dead bug is good to >30

0 MHz. I've used it in the last year or two in a fairly fancy 250-450 MHz s ynthesizer for a heterodyne laser microscope project.

Cheers

Phil Hobbs

Reply to
pcdhobbs

Bug cruelty! I prefer by bugs live, so I don't have to use a mirror to count the pin numbers.

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John Larkin         Highland Technology, Inc 

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John Larkin

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