Does a LS-TTL input *really* needs a pull-up resistor when driven by an open collector (or drain) output? If so, which highest resistor value would be recommended?
It's not obvious to me so far! Tim
- posted
17 years ago
TTL input pull-up
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- posted
17 years ago
The pull-up improves switching speed and noise immunity.
Based on the calculation given in my LS-TTL data book, for one 74LS03 open-collector output driving one LS gate or MSI input (0.5 U.L.) Rx(max) =
20k.- Vote on answer
- posted
17 years ago
In non-open collector gates, there is an upper (pull-up) output transistor that is connected to VCC and a lower (pull-down) output transistor that is connected to ground. When the gate's output is HI, the upper transistor is turned on, and the lower transistor is turned off. When the gate's output is LO, the upper transistor is turned off and the lower transistor is turned on. An open collector gate does not have the upper (pull-up) transistor. Therefore a resistor is connected from the gate's output (the collector of the lower transistor) to VCC. The value of the pull-up resistor varies depending on how many gates the output is connected to, but a value from 2.2K to
10K is a good place to start. A larger value resistor uses less current, but causes a longer rise time than a lower value resistor. HTH-Dave Pollum
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- posted
17 years ago
Thanks for the info.
Regards! Tim