Toggling Flip Flop - 74LVC1G74

Anyone try building a toggling flip flop with a 74lvc1g74 family part?

I've taken an existing 'standard' toggling D flip flop circuit - connecting \Q back to the D input and toggling the Clock input with a switch connected to B+ (3.3v in this case). The switch is debounced with a 10ms debounce RC. Set and Reset are both connected high.

The circuit works just fine with a 74hc74 part, but when a 74LVC1G74 is subsituted, the Q output tends to stay high. When the switch is depressed (i.e. the clock input is held high), Q goes low, but when the switch is released, Q goes high. Switch debounce was ruled out, and a PIC output was connected to the FF clock input to provide a 'cleaner' clock signal. Same response.

Power supply was also monitored and found clean.

Any ideas? I am suspecting some problem with this logic family; but if so, what is the proper logic family to use?

Thanks, TomC

Reply to
tomcee
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Use a Schmitt trigger in front of the clock?

Reply to
krw

It sounds like some sort of bounce to me. How'd you rule it out? Bribe a local judge?

How long is the trace to the clock, how well impedance matched is it, and how sharp are the edges? If it's either transitioning too slowly, or if it's transitioning fast and is reflecting around, then you're going to see some oddball behavior. How well are your power supplies decoupled? Do you have nice 100nF caps between VCC and ground? One for each chip, and as close as possible?

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www.wescottdesign.com
Reply to
Tim Wescott

Sounds like cockpit error. TI wouldn't sell bad flipflops.

Incidentally, an RC is not a good debouncer for fast logic like this.

John

Reply to
John Larkin

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