Anyone try building a toggling flip flop with a 74lvc1g74 family part?
I've taken an existing 'standard' toggling D flip flop circuit - connecting \Q back to the D input and toggling the Clock input with a switch connected to B+ (3.3v in this case). The switch is debounced with a 10ms debounce RC. Set and Reset are both connected high.
The circuit works just fine with a 74hc74 part, but when a 74LVC1G74 is subsituted, the Q output tends to stay high. When the switch is depressed (i.e. the clock input is held high), Q goes low, but when the switch is released, Q goes high. Switch debounce was ruled out, and a PIC output was connected to the FF clock input to provide a 'cleaner' clock signal. Same response.
Power supply was also monitored and found clean.
Any ideas? I am suspecting some problem with this logic family; but if so, what is the proper logic family to use?
Thanks, TomC