1. Home
  2. Electronics Design
  3. Toggling D Flip Flop with LVC Device

Toggling D Flip Flop with LVC Device

Has anyone any experience with building a simple toggling D flip flop with a 74LVC74 device?

Using a standard toggling flip flop circuit - that is connecting the \Q output back to the Data input of the flip flop and drive the CLK input with a debounced (via a RC (1 to 10 ms tau)) switch which is tied to VCC.

When using a 74HC device, the circuit operates as expected - textbook type operation - the Q output toggles with each switch depression; the output toggles on the rising edge of the CLK input.

However, substituting a 74LVC part in the same circuit does not work - the Q output simply follows the switch - that is, when the switch is depressed (i.e. the CLK input is held high), the Q output is high, and when the switch is released, the Q output is low.

Suggestions / Advice welcome.

Thanks, TomC

Reply to
tomcee
Loading thread data ...

On a sunny day (Sat, 30 Jul 2011 05:50:54 -0700 (PDT)) it happened tomcee wrote in :

Risetime too slow? Metastability?

Reply to
Jan Panteltje

Suggestion? Read the data sheet!

John

Reply to
John Larkin

Respond to the answers you already got from your earlier post?

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
Reply to
Tim

He probably didn't see them. A lot of people are complaining that Google Groups is screwed up, again.

--
It's easy to think outside the box, when you have a cutting torch.
Reply to
Michael A. Terrell

There's something new about that?

Reply to
krw

No, but it was apparently out for more than a day this time.

--
It's easy to think outside the box, when you have a cutting torch.
Reply to
Michael A. Terrell

I've messed around older dual flipflops to drive steppers. Sometimes a breadboard will be susceptible to extraneous noise even when you think you've got it debounced. 74 HC works well so thats where I stopped and I never bothered with lower power types.

Reply to
bw

hat

Four days. Missed you guys...

-- Cheers, James Arthur

Reply to
dagmargoodboat

One thing about these LVC parts is they have hideous shoot-through when outputs change state. A board I designed a few years ago had shoot-through currents of about 1 Amp that lasted about 2-3 ns every time the outputs transitioned. I eventually had to change to a different logic family, the 74AUP series, which has amazingly smaller shoot-through, and it solved all the problems in digital => analog crosstalk. The AUP is good for 3.3 V supply, but it was actually beneficial to convert the whole board over to 3.3 V on that project.

Jon

Reply to
Jon Elson

Aw, shucks...

Reply to
krw

(Hands KRW another bushel of corn)...

--
It's easy to think outside the box, when you have a cutting torch.
Reply to
Michael A. Terrell

Sorry for the repeated question - google groups was dead for a day or so.

Thank you to those of you that responded with helpful ideas.

We found the root cause.

Not noise, not a power supply issue.

The LVC family requires an edge with a slew rate on the order of 1v/

10ns. If a lower slew rate is used, it appears that the devices behaviour is undefined.

Debouncing the switch with an RC as we had done is not acceptable. Changing the clock circuit to provide the proper edge provided the solution.

TomC

Reply to
tomcee

(...)

Thanks for closing the loop and telling us what you discovered.

It appears that TI (at least) needs to edit out boilerplate that they copied from their 74HC74 data sheet. (Top of Page 2): "Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse."

formatting link

Oopsy.

Elsewhere in the same sheet, they specify a minimum input slew rate of 10 nS / V!

Fairchild claims a minimum slew of 100 nS / V and does not include the misleading text:

formatting link

--Winston

Reply to
Winston

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.