OK, we've all been bitching - silently or vocally - about the low SNR at SED. Here's a real, albeit small, design question.
The venerable PWM controller TL494 was widely used in older computer power supplies. It differs from the similar SG3524 in that, in addition to two error amplifiers, it has a dedicated dead time control (DTC) pin. It allows minimum dead time at 0V and zero duty cycle at around +3V.
In the PSU designs I've analyzed, the DTC pin is held at 0V in normal operation and is pulled high under fault conditions such as overvoltage or failed 'power good' signal.
I'm considering using the TL494 in a minor project with the roles of the DTC and error amps interchanged. The IC will provide free running push-pull pulse outputs to drive a power stage with a fixed duty cycle set by the DTC pin. There will be no feedback from the output Under normal conditions and the error amps will intervene only under fault conditions.
There's just one thing I'm not perfectly clear about from looking at the datasheet: Can the error amps override the fixed duty cycle setting in case of a fault?