I decided, interlaced with cooking and serving three sessions of turkey dinner, to simulate the 155.52 MHz PLL, the one that uses a 10 MHz reference and a d-flop bang-bang phase detector. The LT Spice thing is below, and here's a typical run:
The advantage to posting the screen shot is the insane Spice runtimes: it takes about 10 minutes to do 2 ms of sim, and that's with a 50 ps time step. At 1 ps step, it would take all day.
It behaves like you'd expect: the VCO input starts off railed, reflecting the random startup phase error between the 10 MHz and
155.52 MHz clocks. The 155 creeps in phase until the edges cross, then it goes into bang-bang mode, alternating early:late at 80 KHz. So the VCO frequency jumps up:down at 40 KHz.The jitter is easy to calculate: the VCO input is updated every 12.5 us, so the sampled 155 MHz edge runs Xppm*12.5 us fast/slow where X is how many PPM the VCO input is wiggling. 1 ps is 80 PPB of 12.5 us. I figure that, for a 1 volt normalized VCO input with +-60 PPM pull range, I'll need a bit under 2 mV p-p bang-bang voltage swing at the VCO node. Of course, that suggests that I'll need some clever strategy to find lock and stay there.
Of course, this sim is noiseless, and adding jitter in the oscillators and logic makes it a bit more complex. Specifying the required phase noise of the VCXO is interesting; the VCXO could cost $15, or it could cost $600.
So, Spice simulation of a serious PLL is not terribly useful. But it does enforce a lot of waiting and thinking, which is useful.
Version 4 SHEET 1 1660 728 WIRE 976 -384 928 -384 WIRE 1024 -384 976 -384 WIRE 128 -352 80 -352 WIRE 192 -352 128 -352 WIRE 352 -352 272 -352 WIRE 416 -352 352 -352 WIRE 480 -352 416 -352 WIRE 928 -336 928 -384 WIRE 928 -336 880 -336 WIRE 1152 -336 928 -336 WIRE 1280 -336 1216 -336 WIRE 1328 -336 1280 -336 WIRE 1472 -336 1408 -336 WIRE 1536 -336 1472 -336 WIRE 1568 -336 1536 -336 WIRE 672 -320 624 -320 WIRE 816 -320 752 -320 WIRE 352 -304 352 -352 WIRE 1088 -304 1056 -304 WIRE 1152 -304 1088 -304 WIRE 1056 -272 1056 -304 WIRE 1472 -272 1472 -336 WIRE 352 -176 352 -224 WIRE 1056 -160 1056 -192 WIRE 1472 -160 1472 -208 WIRE -224 -128 -304 -128 WIRE -176 -128 -224 -128 WIRE 352 -48 352 -96 WIRE 144 48 64 48 WIRE 192 48 144 48 WIRE -304 80 -304 -128 WIRE -160 80 -304 80 WIRE 592 128 528 128 WIRE 672 128 592 128 WIRE 928 128 832 128 WIRE 1008 128 928 128 WIRE 1264 128 1168 128 WIRE 1312 128 1264 128 WIRE -304 160 -304 80 WIRE 512 176 464 176 WIRE 672 176 512 176 WIRE 1008 176 944 176 WIRE -304 304 -304 240 WIRE 672 320 624 320 WIRE 944 320 944 176 WIRE 944 320 672 320 FLAG -304 304 0 FLAG -224 -128 10_MHz FLAG 144 48 80_KHz FLAG 512 176 10_MHz FLAG 928 128 BB FLAG 1264 128 BB80 FLAG 672 320 80_KHz FLAG 352 -48 0 FLAG 128 -352 BB80 FLAG 976 -384 155_MHz FLAG 592 128 155_MHz FLAG 1056 -160 0 FLAG 1536 -336 LOCK FLAG 1472 -160 0 FLAG 416 -352 VCO FLAG 1280 -336 XOR FLAG 1088 -304 REF SYMBOL Digital\\counter -80 48 R0 WINDOW 3 0 0 Invisible 2 WINDOW 0 17 -93 Left 2 SYMATTR Value cycles=125 SYMATTR InstName A1 SYMATTR Value2 vhigh=1 SYMBOL voltage 352 -192 R0 WINDOW 0 -105 53 Left 2 WINDOW 3 -107 83 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 0.5 SYMBOL Digital\\dflop 752 80 R0 WINDOW 0 -15 -83 Left 2 SYMATTR InstName A2 SYMATTR Value2 vhigh=1 SYMBOL SpecialFunctions\\modulate 480 -352 R0 WINDOW 0 48 -99 Left 2 WINDOW 3 -80 138 Left 2 SYMATTR InstName A5 SYMATTR Value mark=155.51e6 space=155.53e6 SYMBOL Digital\\dflop 1088 80 R0 WINDOW 0 -21 -82 Left 2 SYMATTR InstName A3 SYMATTR Value2 vhigh=1 SYMBOL res 336 -320 R0 WINDOW 0 -93 34 Left 2 WINDOW 3 -97 65 Left 2 SYMATTR InstName R1 SYMATTR Value 100 SYMBOL res 288 -368 R90 WINDOW 0 -53 51 VBottom 2 WINDOW 3 -46 55 VTop 2 SYMATTR InstName R2 SYMATTR Value 1K SYMBOL Digital\\buf 816 -384 R0 WINDOW 0 6 -2 Left 2 SYMATTR InstName A6 SYMATTR Value2 vhigh=1 SYMBOL voltage 768 -320 R90 WINDOW 0 -87 58 VBottom 2 WINDOW 3 -78 59 VTop 2 SYMATTR InstName V2 SYMATTR Value 0.5 SYMBOL Digital\\xor 1200 -384 R0 WINDOW 0 -35 -4 Left 2 SYMATTR InstName A4 SYMBOL voltage 1056 -288 R0 WINDOW 0 -66 110 Left 2 WINDOW 3 -256 181 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value PULSE(0 0.9 1.5n 100p 100p 3.215n 6.43004n) SYMBOL res 1424 -352 R90 WINDOW 0 -53 54 VBottom 2 WINDOW 3 -45 57 VTop 2 SYMATTR InstName R3 SYMATTR Value 1K SYMBOL cap 1456 -272 R0 WINDOW 0 -73 16 Left 2 WINDOW 3 -70 51 Left 2 SYMATTR InstName C2 SYMATTR Value 1n SYMBOL voltage -304 144 R0 WINDOW 0 95 108 Left 2 WINDOW 3 39 147 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V4 SYMATTR Value PULSE(0 1 0 0 0 10n 100n 1e9) TEXT -272 -296 Left 2 !.tran 0 1m 0 50p TEXT 512 -416 Left 2 ;VCXO TEXT 680 40 Left 2 ;Bang-Bang PD TEXT 1008 40 Left 2 ;80 KHz sampler TEXT 160 -216 Left 2 ;PLL Gain Set TEXT -288 -400 Left 3 ;155.52 MHz PLL TEXT -288 -352 Left 2 ;J Larkin Nov 28, 2014 TEXT -88 16 Left 2 ;DIV 125 TEXT -248 216 Left 2 ;10 MHz GPS INPUT