I have a test fixture that has been in use for some 8 years testing thousands of units. It is not a complex unit with a power supply section, an FPGA, an RS-232 level converter chip, two RS-422 receiver/driver chips and various connectors for the UUT and test points. It is powered by a CUI wall wart bought from Digikey.
It has worked very well over this time requiring a replacement of the FPGA only once before, likely because of my fat fingering something. On this last batch of boards the FPGA has been failing regularly. One pin on the FPGA stops reading the signal from the UUT. I have to assume it gets blown up. But I can't see how this could happen. They are using full anti-static protections with conductive flooring, conductive bench tops, conductive chairs, conductive smocks, etc. The idea that static is the problem is equally absurd as it is compelling.
Of course the factory people aren't even very excited about pursuing the possibility it is static related. The last email points out only the tester FPGA gets blown, not the same FPGA on the UUTs. On the UUT these parts are separated by a 5 to 3 volt quickswitch converter because the motherboard in the application system uses 5 volt logic on this interface.
I'm pretty much at a loss to figure out what has changed. We've noticed the markings on one chip on the production boards has different markings, but it is not near the interface, so I don't think this is a problem. Still, I've sent images to the manufacturer asking if either might be counterfeits.
If the FPGA on the test fixture continues to blow, I am going to make a buffer board to isolate at least that one pin. Any suggestions on a good device to use? It needs to be fairly fast. I don't have a requirement for that spec, but I recall this was a tight timing I/O from when I designed the production boards. I don't want to add much delay here.