Surge current limiting on large capacitors and power factor correction (PFC)

I've posted previously about failures in my push-pull high power DC-DC=20 converter, which have most likely been caused by start-up surge currents =

when first connected to the DC source (batteries), and when the = converter=20 starts charging the output capacitors through a bridge rectifier with a=20 square wave. I think I have found several options such as a resistive=20 precharge resistor or a current-limiting switching circuit either as a=20 front-end add-on, or as part of the push-pull PWM.

Now I am looking at two designs used in electric vehicles and described = in=20 threads:

open-source-59210.html and

The charger uses AC mains of 120 or 240 VAC to charge the battery pack,=20 which may be 72 VDC to as much as 700 VDC, and generally about 100 A-Hr, =

which is 86 to 840 kW-hr. So an 8 hour charge may require 10 kW to as = much=20 as 100 kW. One charger design is:

There have been some problems with getting maximum power because of the=20 input surge currents and high PF due to the capacitors. I offered some=20 improvement using a precharge resistor and an inductor as follows:

s.png

The LTSpice ASC files are in the same folder and you can read the = directory:

To be really effective at line frequency, the inductor must be rather = large=20 and expensive. And the power factor was not really improved all that = much=20 with the smaller ones that are of reasonable size and cost.

So, I plan to try some switching techniques to reduce the initial inrush = and=20 also to improve power factor. I found an interesting resource on PFC at:

But I didn't understand all of it, and I wanted to propose an idea that = may=20 or may not be one of the topologies discussed there.

If you know of any better resources or actual circuits, please let me = know.=20 I did some searching but it seems that PFC circuits may be trade = secrets.

Basically, I plan to just rectify the incoming power through a FWB. Then = I=20 would like to design a switching circuit consisting of an inductor, = diode,=20 and series MOSFET as a forward buck regulator, so that it would allow = the=20 incoming voltage to apply current through the inductor until it reaches = like=20

1.5 times the maximum expected output current, and then disconnect until = the=20 current drops to about 0.75 times the output current. Thus it would run = in=20 continuous mode and the input current would remain within reasonable = limits=20 of the available source current.

As the input voltage increases, the duty cycle would decrease, although = it=20 would be more a function of the difference between the input and output=20 voltage (on the main storage caps as they are charging). This process = would=20 continue until the capacitors are fully charged and hopefully the PWM = would=20 continue to draw a relatively constant current from the supply line. It = may=20 even be better to operate this switcher as a buck/boost so that it will=20 provide a higher output voltage near the zero crossings of the input = supply,=20 and a lower voltage when the supply peaks exceed the intended fully = charged=20 output voltage.

This is still a conceptual design, so I wanted to get some feedback = about=20 its chance of working and any pitfalls to avoid. This will be a fairly=20 high-end piece of equipment so it is no problem to use microcontrollers=20 and/or dedicated ICs. I'll discuss the other item (DC-DC converter) in a =

separate thread.

Thanks!

Paul=20