Super low power isolated MOSFET driver

Is PWL a floating power supply, on the high side? Is that available? Everything is grounded in your sim.

I'd consider going optical, a PV supply and a dual (or maybe single) optoisolator. No highside power supply, DC drive coupling.

Yes.

Just for the ease of prototyping of the core idea. At the beginning the modelling of the bipolar transformer drive was crazy enough. It will be fully isolated in the real application.

Optical devices have too high FIT value. To be eradicated just after electrochemical capacitors.

Best regards, Piotr

Tons of parts accumulate FITs too. I haven't found optos to be unreliable. If PWL is an existing floating power supply, the whole thing reduces to one optocoupler and no states to have hazards.

Simple answer is no. In the absence of transformer pulses the Trig and Thrs pins will power up at 50% Vdd which is midway between their comparsion references so neither state can be assured. You need to find a way to assert Rst or drive Thrs higher than 2Vdd/3 to get power up in the output low state.

piglet

In practice 555's tend to power up

Hi Piotr,

I hacked your schematic into this simple minded version that will start up always with output low. Gate can be turned off within a few us of the keep-alive pulse stream disappearing - I dont know if that is responsive enough but you did say slow :)

Choose C2 value to be near resonant to L.

Version 4 SHEET 1 2408 772 WIRE 464 -928 64 -928 WIRE 176 -832 128 -832 WIRE 304 -832 256 -832 WIRE 544 -832 384 -832 WIRE 128 -704 128 -832 WIRE 176 -704 128 -704 WIRE 544 -704 544 -832 WIRE 544 -704 400 -704 WIRE 128 -688 128 -704 WIRE 64 -640 64 -928 WIRE 176 -640 64 -640 WIRE 1120 -592 880 -592 WIRE 176 -576 -16 -576 WIRE 464 -576 464 -928 WIRE 464 -576 400 -576 WIRE 880 -560 880 -592 WIRE 176 -512 128 -512 WIRE 432 -512 400 -512 WIRE 432 -496 432 -512 WIRE 880 -432 880 -480 WIRE 1120 -432 1120 -592 WIRE 432 -416 432 -432 WIRE -16 -352 -16 -576 WIRE 656 -352 -16 -352 WIRE 832 -352 736 -352 WIRE 880 -320 880 -336 WIRE 1120 -320 1120 -352 WIRE 128 -288 128 -512 WIRE 288 -288 128 -288 WIRE 544 -288 544 -704 WIRE 544 -288 288 -288 WIRE 288 -256 288 -288 WIRE 128 -240 128 -288 WIRE 64 -144 64 -640 WIRE 128 -144 128 -176 WIRE 128 -144 64 -144 WIRE 288 -144 288 -176 WIRE 288 -144 128 -144 WIRE 64 -80 64 -144 WIRE 144 -80 64 -80 WIRE 336 -80 208 -80 WIRE 544 -80 544 -288 WIRE 544 -80 416 -80 WIRE 272 32 -96 32 WIRE 464 32 336 32 WIRE 464 112 464 32 WIRE -96 160 -96 32 WIRE -96 272 -96 240 WIRE 464 288 464 192 FLAG 464 288 0 FLAG 880 -320 0 FLAG 1120 -320 0 FLAG 128 -688 0 FLAG 432 -416 0 FLAG -96 272 0 SYMBOL cap 336 16 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C2 SYMATTR Value 68p SYMBOL ind2 448 96 R0 WINDOW 3 -12 60 Right 2

SYMATTR InstName L1 SYMATTR Type ind SYMBOL ind2 432 -64 M270 WINDOW 0 32 56 VTop 2 WINDOW 3 4 56 VBottom 2 SYMATTR InstName L2

SYMATTR Type ind SYMBOL res 752 -368 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 50 SYMBOL nmos 832 -432 R0 SYMATTR InstName M1 SYMATTR Value IXTH88N30P SYMBOL res 864 -576 R0 SYMATTR InstName R4 SYMATTR Value 300 SYMBOL voltage 1120 -448 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 300 SYMBOL Misc\\NE555 288 -608 R0 SYMATTR InstName U1 SYMBOL voltage 272 -832 R90 WINDOW 0 -32 56 VBottom 2 WINDOW 3 -84 34 VTop 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V4 SYMATTR Value PWL(0 0 100u 9.6) SYMBOL res 400 -848 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 1m SYMBOL cap 416 -496 R0 SYMATTR InstName C1 SYMATTR Value 1n SYMBOL res 272 -272 R0 SYMATTR InstName R6 SYMATTR Value 20k SYMBOL voltage -96 144 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V5 SYMATTR Value PULSE(0 2.7 300u 10n 10n 0.5u 1u 400) SYMBOL diode 144 -64 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName D1 SYMATTR Value 1N914 SYMBOL cap 112 -240 R0 SYMATTR InstName C3 SYMATTR Value 100p TEXT -160 416 Left 2 !.tran 1m TEXT 512 184 Left 2 !K L1 L2 0.98

piglet

MIL-HDBK-217 (which introduced FITs IIRC) is a random-number generator.

You can improve your design's FITs by taking out all the ESD protection, current limiters, fuses, supply-reversal protection diodes, self-test capability, and other such non-essential functions.

It also assumes that all failures have an Arrhenius temperature dependence, which is nuts.

Cheers

Phil Hobbs

The bipolar 555 is piss, obviously you'd use a CMOS model, yeah.

I've done that before (happened to be a discrete circuit). But have you thought about common mode immunity yet?

Consider using something like this,

Even an Ethernet transformer will do, if you don't mind the 1kV isoation rating (in this case obviously you would mind). The flux is quite small, but more than adequate for little pulses, and the isolation barrier is smaller (lower capacitance). Double balanced design again, and usually comes with CMCs included (for even more immunity).

Forget if you can find COTS Ethernet transformers with reinforced kV+ isolation, if so that may be handy. Huh, probably same price as the Pulse part anyway...

Another approach that may be of interest, pulse or frequency modulation. ASK through one transformer allows you to maintain high-side power, while filtering the signal for immunity.

OOK through two transformers, you could do the same while sharpening it with a flip-flop (in essence, detect and filter two signal paths, and route them to your 555's inputs).

PSK would be... interesting to decode without a clock reference (two transformers would be easy, one would be harder), but could be unambiguous (in phase = on, etc.; or 90 deg. to the right = on, etc.).

FM, you could use a crude discriminator, like a missing-pulse detector; give or take additional filtering before or after, you can clean up most interference.

Could all be done at VHF too, in which case planar magnetics are feasible (coreless or otherwise), or even at UHF where interference from power supplies is unlikely and the resulting bandwidth (which might be say 5-10% of Fc) is competitive with monolithic drivers.

Tim

-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Design Website:

The handbook doesn't have a table entry for the FITS of "bad design."

How about a retriggerable one-shot? As long as you keep pulsing it, the mosfet is on.

on a tiny 1:1 bipolar drive pulse transformer and a 555

Not sure about 5kV transformer being 'tiny'. Why not pulse a dual optoisolator, and at the high side have it set/reset a CMOS flipflop. Even if it takes a couple of milliamps to strobe the opto, if you do that for a microsecond every tenth of a second, it only takes a tiny average current at the low side. If you put some capacitance on the HV side power, the CMOS drive is quite peppy, even at trickle-from-a-Li-cell power drain on the high side.

It is, fits nicely within its creepage area. A 6mm OD F938 core + 2x11 turns made of the thinnest available TIW.

This is basically what the 555 is. AFAIK there are no CMOS flip-flops capable of gate drive voltages/current in SO8 or smaller. Flip-flops with predefined initial state are even more rare.

My first "correct on the paper" approach was to use a SOT23 MOSFET driver with UVLO and make a latching buffer out of it with a resistive divider between out and in. The UVLO would ensure the initial off state. There are parts with -5V Vin tolerance, so a simple bipolar inductive buffer state override at the input would work safely without any additional parts -- just overpower the divider for enough microseconds.

The problem would be with Cgd and Cgs of the driven transistor -- a sufficiently strong transient would be able to override the buffer state as well. So two buffers would be necessary in series, one to manage the state and one to drive the FET without any feedback. Which... the 555 is. :-)

Sure -- my pulse trafo is going to be driven exactly the same way. The sim pulse train is dense just not to wait too long for the sim to complete. The duty cycle in practice would be much lower than that, maybe a state change per week or so. So only the floating side energy consumption + all the internal housekeeping expenses matter.

Best regards, Piotr

Piotr Wyderski wrote in news:r03jiu$jt1$ snipped-for-privacy@gioia.aioe.org:

I made a 15kV supply that you could fit 6 of into a pack of cigarettes.

The multiplier section was potted in a 1 inch square box just under

snipped-for-privacy@decadence.org wrote in news:r03n3j$13cq$ snipped-for-privacy@gioia.aioe.org:

Was like 300V per segment.

This sort of thing is easier and has no states that can be glitched.

Add a resistor across one phototransistor to define a default state, probably mosfet off.

This is a good idea, too. Thanks, John!

Best regards, Piotr

It might be scary to float a flip-flop up there. High voltage circuits might make EMI that could confuse a flop. I like the idea of no drive ==> fet is guaranteed off.

It could be simple: transformer, 3.3 or 5v Tiny cmos one-shot, and maybe a 10V gate driver. On the bottom side, just gate a clock into the transformer primary, or don't.

Isn't that just what I posted 24 hours ago - using Piotr's 555 as the retriggerable?

With minor refinement he could probably get the pulse transformer to also power the driver thus taking on the floating power supply role, use high pulse rate for driver ON and low pulse rate for driver OFF - FSK.

piglet

Piotr Wyderski wrote in news:r024bu$4ra$ snipped-for-privacy@gioia.aioe.org:

An audio chip with a VFO driving it. The audio chip is adjustable on the output power. So 2 points of adjustment. They drive downstream circuits pretty darn good, unless you want faster oscillation than they cover.

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You can do isolation with spiral coreless coils quite simple:

The important parameter to look for is the parasitic capacitance over the i solation barrier, which creates problems with conducted emissions and susce ptibility to fast dV/dt transients on the switching node

Another nice paper is this one:

About modulation, nothing really beats a AM. Just start an oscillator when you need to trigger the FET, transmit the pulse through the transformer, im pedance match, rectify and apply to the gate. With