Don't worry about it:
- The mask fab will do the most obvious things themselves (e.g., break large regions into grids). Also typical is making a dogbone or chevron shape for bigger chips (0805+).
1a. Unless you're starting up your own assembly house, expect to do a lot of rework anyway. Pasting saves time over 100% hand soldering, but don't expect it to be perfect your first time, or even your 100th time.
In short, without having any existing process control to speak of, you aren't going to save much time doing tweaks on the front end -- in particular, you won't have any chance to feed changes back into the process.
I'm assuming this is a one-off sort of thing, hence why it hasn't come up before, and may not come up again (but, again again, if you _are_ starting up an assembly house--).
- A CM will already have their process dialed in, so will make tweaks to the paste layer to their satisfaction (if you provide a modified paste layer, they'll probably just regenerate it from pads, using their own rules and geometry?).
Concentrate more on getting the pads IPC-compliant. You'll see all sorts of bizarre footprint dimensions in datasheets, but IPC rules exist because they give consistent results.
On that note, some packages are ridiculously loose. JEDEC packages in particular. TO-220 is awful, sure, but DO-214 is as well. Most manufacturers give a footprint that's closer to an IPC "high density" (reduced outline) footprint, but which violates (according to IPC rules) the very drawing they give. Because, of course they give the JEDEC DO-214 with its shitty tolerances, why give the internal drawing with correct tolerances? But they give the footprint from it. So, presumably, you can infer some dimensions of that drawing with modest confidence, based on their footprint. From this, you can draw a regular IPC footprint, of whatever "density" you like.
Again, feedback is possible (maybe the ideal pads are slightly different, for various reasons), but only if you have a closely coupled process.
Another note, don't be afraid to shave pad widths. Some TSSOP, MSOP, etc. have suspiciously wide pins, for which you can't possibly have positive side fillet AND soldermask between pads. The IPC tolerance for side fillet is -0.03mm so a little pad shaving is perfectly acceptable. For 0.5mm pitch, 0.22 to 0.25mm width pads usually leave enough space for soldermask, assuming 3-4 mil minimum web width, and 2-3 mil soldermask expansion. Correct soldermask is best; but if you can't manage it, no soldermask is better than too-thin webs flaking off, adhering to pads and causing open joints.
IPC-7351 is available for free and isn't much different from the latest version, at least in terminology and rough values. You can usually find copies of such documents floating around on suspiciously-public websites, indexes or FTPs; give it a quick search.
Tim