Simple pulse generator circuit

There are lots of ways to do this, but you need to give us more to go on. (Since you were starting with a 555, I gather that this is probably

How is the pulse width set? A resistor? A voltage?

How is the pulse triggered?

What's the tolerance on pulse width, rep rate, and jitter?

What output voltage and current do you need?

What's the load?

What are the limits on rise and fall time?

How much overshoot can you stand?

Cheers

Phil Hobbs

Sounds like a job for a one shot.

George H.

I did quick search on digikey and it looks like the AHCT sereis is faster. (to meet the 10ns spec.)

I should order some, Say is there a good site that discusses the differences between the various logic families? HC, HCT, AHCT.

George H.

How did you get a 555 to pulse at 10 Nano-Sec ??!!

Ok, do you require 10 -> 250 nS in one nS steps ?

That would require a CPLD or FPGA to do that.

A CPLD with a 200 Mhz clock would be able to give you a 1nS step.

You can still use the 555 for the 2Hz part. ;-)

I don't think you can get 10 ns pulse width from a '123. They're slow as molasses.

Cheers

Phil Hobbs

Boy, I must not be awake yet.

So two clock edges of 200 Mhz = 10 nS

Two clock edges of 2,000 Mhz = 1 nS !!!

Are you sure you want 1 nS resolution ?

If so, you will need some FAST FPGAs !!

You betcha. Now regulate the supply of one of the inverters for variable pulse length. For better results, regulate on both Vcc and GND sides.

Vladimir Vassilevsky DSP and Mixed Signal Consultant

Nah, it probably needs a 74AC123 with a cheesy 74AC00 AND gate pulse shrinker ( one-shot connected to one input directly and to the other via an RC lowpass), a pot, and a trigger pulse. The OP can adjust the minimum pulse width by tweaking the pulse shrinker.

One wouldn't suggest that level of crappiness except that the OP was talking about a 555, so it's probably a one-off. (I've done worse things than that in one-offs!)

Cheers

Phil Hobbs

I don't think that any of the 123-type parts will get down to 10 ns.

One easy trick is to use a dual 123, and use one section to subtract out the minimum pulse width of the other. A couple of AND gates will do that. Make a narrow pulse from the difference between two wide ones.

I recently did a pulse generator that goes down to 100 ps. One delayed signal clocks a flipflop to set it, and another delayed signal clears it. Tease the relative timings to get a very narrow pulse. The gotcha was that, to get a 100 ps output, I have to clear the flop about 250 ps before I clock it!

In other words, Phil wants you to define "clean".

With that much disparity between the pulse width and the interval, you're almost certainly going to need two timers -- one for the 2Hz, and one for the pulse.

For that matter, just a 10ns pulse is pretty damn fast, with significant content up to 200MHz, and plenty more past that if you want sharp edges and no ringing. I'm not sure that you're going to find many chips that not only generate a pulse, but that give you edges that will look very square on an oscilloscope.

Yeah... maybe a faster process. The AHCT series?

lists a minumum tsubw of 5ns. That sounds promising.

But the graphs don't look so good.

George H.

Here's a 13 ns pulse

that comes from four sections of a 74HCT245 in parallel, with a 50 ohm series resistor. ACT would have been faster.

Some of the TinyLogic parts will swing 5 volts in 600 ps or so, very clean.

Fast edges need good multilayer PC board layouts.

Looks like 50, maybe 60 ns with Cext=0.

--- View with a fixed-pitch font:

. +---+---------+ . Rt1 | | | . [1M]| |OUT ___| |___ _ _ ____| |___ . +-O|TR R|O--+V [Rt2] +--B . |+ +---+---+ | | ______________ . [1µF] 1| 7555 +---+ 7555 OUT___| |______ . Ct1| | | . | | [Ct2] . GND GND | . GND

Adjust Rt1 for a 1Hz signal out of the 7555 and RT2CT2 for the delay needed to get the output pulsewidth you want.

-- JF

With modern parts, there is nothing superstitious about sub-nanosecond edges. BTW, plain vanilla 74HC04 at 3.3V power generates 5ns transitions with 20pF load.

Vladimir Vassilevsky DSP and Mixed Signal Consultant

ow

.highlandtechnology.com=A0 jlarkin at highlandtechnology dot com

Yeah, Sorry I made a mistake and was reading the wrong parameter.

I seem to remember getting 50 ns from a 74LS123 (or 221)

The double pulser with one swallowing most of the other is a nice trick. (I'd just forgotten about it.)

George H.

And what are you using to measure the result to see how it conforms to all of the above?

This smells like one of those projects that starts out with a vague concept that gets tweaked into a nightmare scenario.

Last time I saw anything with a billion-to-one ratio, it ended up as a digitally gated master clock in a multi-section cavity to keep one end of the board from talking to the other.

The XOR will make an output pulse on both edges of the input. The alternate pulses won't be the same width.