I'm using one of these - a serial/parallel shift register.
It's straight forward enough except when it comes to startup. The master reset only affects the internal shift register, not the stored outputs, so if OE is low at power on, random outputs will appear. To avoid that I seem to have to hold OE high while MR is held low to clear the shift register, then have a rapid transition on the storage register clock input, and only then bring OE low to enable the outputs.
In practice, I'll not bother with MR, and instead just clock enough zeroes in to clear the shift register.
That still leaves me with having to control OE for the sole purpose of preventing random outputs during initialisation. Were it not for this, I'd just tie OE low, since I don't need the tri-state output function.
I'll have to dedicate a scarce microcontroller pin to this, and propagate it across several boards.
Surely it shouldn't be this complicated.
Sylvia.