If a sense amplifier in SRAM is designed for 3v , it cant sense 2v difference. How can a senseamp can be modified ? Designing the whole thing again with different devices [FETs] is one obvious solution . But can it be done in some other better way?
Dynamic RAM uses a sense amplifier, SRAM does not. SRAM is entirely composed of logic-level circuitry.
Are you dealing with a logic level translation issue? There are lots of bus-width translators available. I'm not sure what 'designed for 3v' means in terms of your target logic levels, though.
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