Searching for line encoding NAME (not Manchester)

gets mentioned in articles pertaining to other encoding techniques. I firs t saw its use and description in Byte magazine, eons ago. IIRC, it was then incorrectly given a modified Manchester moniker.

simple ratio of low time to high time in a given bit cell (or inverted if you like). You'll need monospaced font to see this ASCII art:

r a 1-bit, the rising edge occurs at 1/3 of the bit time, while a 0-bit ris ing edge occurs at the 2/3 point (or vs versa if you like).

13A, where all that is required to decode this self clocking signal is to t ime the low time vs the high time. The bit is determined by the ratio of th e two durations. Because the bits are determined by ratios, it is forgiving of the RC system clocks that can be used on these 8-pin DIP MCUs.

there is a name for it). The critical element is that there is a transitio n at the 1/3 or 2/3 point within the bit cell.

The "Manchester" encoding scheme goes back to about 1949 - IIRR rightly the re was originally a list of a whole lot of variants, and the usual version was referred to as Manchester 2 by purists.

Googling found me only Manchester and differential Manchester. Miller is mo re complicated.

John Watkinson's "The Art of Digital Audio" lists a bunch of similar codes, but his interest was in codes that might be recorded on magnetic tape.

Manchester was wasteful of bandwidth, but easy to decode - yours seems even easier to decode. Once the semiconductor manufacturers started churning ou t integrated circuits that could decode quite complicated schemes, the inte rest in simpler codes declined.

--
Bill Sloman, Sydney

er gets mentioned in articles pertaining to other encoding techniques. I fi rst saw its use and description in Byte magazine, eons ago. IIRC, it was th en incorrectly given a modified Manchester moniker.

a simple ratio of low time to high time in a given bit cell (or inverted i f you like). You'll need monospaced font to see this ASCII art:

For a 1-bit, the rising edge occurs at 1/3 of the bit time, while a 0-bit r ising edge occurs at the 2/3 point (or vs versa if you like).

ny13A, where all that is required to decode this self clocking signal is to time the low time vs the high time. The bit is determined by the ratio of the two durations. Because the bits are determined by ratios, it is forgivi ng of the RC system clocks that can be used on these 8-pin DIP MCUs.

ly there is a name for it). The critical element is that there is a transit ion at the 1/3 or 2/3 point within the bit cell.

here was originally a list of a whole lot of variants, and the usual versio n was referred to as Manchester 2 by purists.

more complicated.

s, but his interest was in codes that might be recorded on magnetic tape.

en easier to decode. Once the semiconductor manufacturers started churning out integrated circuits that could decode quite complicated schemes, the in terest in simpler codes declined.

Thanks Bill. So it may possibly be a "modified Manchester" code after all. :)

Indeed, this approach is minimalist, at least for the receiver. I have trie d to code for Manchester proper but always ended up with a larger program f ootprint, which is bad for the ISR.

Warren

I did something similar once, where the transmitter was very resource starved and running from RC. I used a spare UART in the receiver set to an appropriate baud rate and did a simple < > comparison on the received 'byte' to determine 0 or 1. Plenty of tolerance to variations, worked just fine.

I called it 'edge position modulation' because it sounded clever.

Cheers

--
Clive

gets mentioned in articles pertaining to other encoding techniques. I firs t saw its use and description in Byte magazine, eons ago. IIRC, it was then incorrectly given a modified Manchester moniker.

simple ratio of low time to high time in a given bit cell (or inverted if you like). You'll need monospaced font to see this ASCII art:

r a 1-bit, the rising edge occurs at 1/3 of the bit time, while a 0-bit ris ing edge occurs at the 2/3 point (or vs versa if you like).

13A, where all that is required to decode this self clocking signal is to t ime the low time vs the high time. The bit is determined by the ratio of th e two durations. Because the bits are determined by ratios, it is forgiving of the RC system clocks that can be used on these 8-pin DIP MCUs.

there is a name for it). The critical element is that there is a transitio n at the 1/3 or 2/3 point within the bit cell.

I don't think it has a separate name other than PWM for Pulse Width Modulat ion.

Rick C.

Is it not some kind of PCM?

Bye Jack

A.k.a. "duty cycle encoding", see page 4:

There is usually a 50% duty cycle start bit unless the data stream is synchronized otherwise or doesn't have to be synchronized for some reason.

Of course, that name might sound too pedestrian :-)

--
Regards, Joerg 

http://www.analogconsultants.com/

There is a 1-wire bus:

that has waveform similar to above.

Why not use a standard existing bus system than reinvent the wheel. You might even get to hang and communicate to 1-wire devices on the bus too! Last one I used was a small memory device.

--
Mike Perkins 
Video Solutions Ltd 
www.videosolutions.ltd.uk

For a 1-bit, the rising edge occurs at 1/3 of the bit time, while a 0-bit r ising edge occurs at the 2/3 point (or vs versa if you like).

ny13A, where all that is required to decode this self clocking signal is to time the low time vs the high time. The bit is determined by the ratio of the two durations. Because the bits are determined by ratios, it is forgivi ng of the RC system clocks that can be used on these 8-pin DIP MCUs.

I've seen similar approaches posted, but the ATtiny13A doesn't even have a UART. :)

Warren

You may be right- I don't know. I just figured that this approach likely has a name for it.

Warren

Warren wrote

No idea about the name, I thought 'hey I remember decoding something like that', just looked it up, PIC asm

DHT11 and AM2302 temperature and humidity sensors uses a system where low is always 50 us, followed by 26 us high for a 0, and 70 us for a 1. never mind the Chinglish, without the waveform display I could not have understood what they ment... In your system the bit length is always the same though... That is a bidirectional bus though, and nowhere in the datasheet is the name of that protocol mentioned, it has some more features such a start signal etc. Does it _have_ to have a name? I can think of near infinite variations on the system. It is a free world.

I'm acquainted with 1-wire devices and protocol but it depends upon specifi c timings. Whereas the approach I posted is based upon time _ratios_. Remem ber I am dealing with a RC based system clock and a very resource constrain ed little 8-pin DIP of a MCU. When you start writing ISR routines for it, you quickly look for simpler measures. One of the goals is to make it relat ively immune to variances in clock rate and tolerance for drifting system R C clocks.

This is prior art - I'm just trying to determine the name of the protocol.

Warren

That system uses a different bit cell length for 1's and 0's. As you say, this is a free world, and I'm not suggesting anyone has to follow the approach posted. The constant cell length leads to less assembler code in the ISR.

It helps in discussion! People can say "I know exactly what you mean by protocol X". Which is far better than having to describe this 1/3 2/3 protocol first.

Definitely. It doesn't have to be 1/3 2/3, but I think you'll agree that is about optimum for ratio measurement. All bits can be swapped 1's for 0's, signal inverted, but after that, there is not much variation.

Warren

On Mon, 20 Aug 2018 06:22:18 -0700 (PDT), Warren wrote: (...)

It's just PWM. It's easier to see with more of the waveform visible as below. I also added an "x" to show the carrier period:

__ ____ ____ ____ |__| |__| |__| | 1-bit

__ __ __ __ |____| |____| |____| | 0-bit x x x x

Now, compare that with various examples of PWM waveforms such as: More examples: They're the same.

--
Jeff Liebermann     jeffl@cruzio.com 
150 Felker St #D    http://www.LearnByDestroying.com 
Santa Cruz CA 95060 http://802.11junk.com 
Skype: JeffLiebermann     AE6KS    831-336-2558

My quibble with that is that PWM encompasses a wide range of variation between the two extremes (like in RC controls). The protocol described only has two points at 1/3 and 2/3, representing two states - a specialization of the more general case.

So it was my opinion that it may have had a special name.

Yet, the sound of crickets might be the answer.

Warren

Warren wrote

Interesting, you use the interrupt.

Since I am reading the sensor I just have a soft timed loop in main. When the data is read it fills the UDP ethernet buffer and triggers a send packet (via the ethernet controller chip). then loops and monitors the rx data flag to see if any ethernet reply happened (reply to ARP request for example). It then sends the MAC, and pauses and then reads the sensor again.

For this sensor the data read sequence is triggered by the processor holding down the signal wire for a certain time (normally high pullup resistor thing). I think if you have no control over the sensor you can trigger an interrupt on one of its edges and set a flag or timer, that is likely what you do, look a timer ratio?

PIC uses the internal RC oscillator (good for a few percent, much better than the 50 % difference between a 1 and 0 of the sensor. The interrupt is only used for serial port, debug and configure MAC address etc

I have written some AX25 decoding software IIRC that does it that way. With those 18F14K22 micros I never have run out of 'time' till now. not even for very fast things, It has a 4x PLL from the internal RC oscillator and that way runs at 64 MHz clock.

Avoid interrupts if possible they can make life very complicated. Often it is possible and faster to poll from the main loop (no register saves, no interrupt vectors), guess you know all that.

Wrote a nice logging and display app for on the PC for it:

logfile:

Menu via serial port: Panteltje (c) humidity_udp_dht22-0.2\n

Commands AnnnENTER set source IP address A.xxx.xxx.xxx saved in EEPROM BnnnENTER set source IP address xxx.B.xxx.xxx saved in EEPROM CnnnENTER set source IP address xxx.xxx.C.xxx saved in EEPROM DnnnENTER set source IP address xxx.xxx.xxx.D saved in EEPROM EnnnENTER set destination IP address E.xxx.xxx.xxx saved in EEPROM FnnnENTER set destination IP address xxx.F.xxx.xxx saved in EEPROM GnnnENTER set destination IP address xxx.xxx.G.xxx saved in EEPROM HnnnENTER set destination IP address xxx.xxx.xxx.H saved in EEPROM LnnnnnENTER set source port, saved in EEPROM PnnnnnENTER set destination port, saved in EEPROM S show data on serial out, saved in EEPROM s do not show data on serial out, default, saved in EEPROM v print status, IP address, ports, and MACs h help (this) \0"

Well if you told me it uses '..protocol' chances are BIG I would have to google for it :-) But for the 'oh yes I know ' sayers, sure, but then think of a fancy name, actually it is old, by moving the negative edge you can do analog too :-) NEPM Negative Edge Position Modulation ?

Analog :-)

We called that long-short encoding.

It's not DC balanced, but that doesn't matter for hard-wired connections.

1/4 and 3/4 might be better for clock tolerance.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com

, this is a free world, and I'm not suggesting anyone

ss assembler code in the ISR.

It only enters the ISR at the signal transition points. At each transition you take note of the duration at the rising signal, then compare the durati on at the falling transition. A simple compare of (timer) duration counts a t the end determines if you got a one or a zero bit (in the carry bit).

d packet (via the ethernet controller chip).

There will be no UDP from the ATtiny13A chip :)

pt on one of its edges and set a flag or timer,

Yes, the ISR just sees the signal on both edges, comparing prior timer coun ts with current counts for duration. That leaves more CPU cycles on the tab le for other purposes.

ess etc

A serial port is a luxury here :) (not available on ATtiny13A).

For the record, this is just a pet software project (I am on vacation doing some investigatory stuff with the ATtiny13A). Ideally, I want to call a su broutine in the tiny to receive some short packet for simple control info. I have no intended application for it, beyond perhaps some control panel u ses.

Very good. I personally gave up on AX25 decades ago-- too slow/painful for my tastes. The only real fun I had with that was connecting to U2MIR when i t was up there (I still have the QSL card).

even for very fast things,

For MCU applications, I normally tend to the STM32 class of device: cheap a nd powerful. But there is a class of dirt simple/cheap that I think the 8-p in ATtiny13A DIP MCU can find its place in.

Blatant stm32 plug:

Hz clock.

No PLLs on the tiny. I've stayed away from PICs because of the expensive pr ogrammer and Windows centric development environment (I am so done with Win dows). I understand some of these things are changing but have had no reaso n to embrace the PIC yet.

I use timers and onboard peripherals where possible, which is usually best done with interrupts. This frees the main thread to do all your mundane pol ling etc. Some of the bottom half (of ISR) code can also run outside of the ISR. It is understood however, that you do have to watch the overhead of ISR calls. You simply have to budget your CPU time to see if that is a prac tical option.

If I were coding for an all-in-one application, I would simply reserve regi sters for ISR use only. This reduces the ISR entry/exit cost. However, my p et project is aiming for a general C callable interface.

aves, no interrupt vectors),

I generally dislike the big polling loop that Arduino programs use. As a so ftware specialist (Linux internet servers), I find that style primitive. Ye t, on minimalist MCUs, I do understand why it is done.

On more luxurious MCUs like the STM32, I love putting components into separ ate tasks using FreeRTOS/similar. The software design is so much cleaner. T here is some added responsibility in that, but the pros outweigh the cons.

protocol X". Which is far better than having to

google for it :-)

That's ok because the "name" search would bring you hopefully to a concise description.

, actually it is old,

No, not interested in going negative. :) The "application" here is for a ve ry simple device.

variation.

I see the smiley, but analog is not allowed here. :)

Warren

At least a similar variant was known as Biphase-H.

Was it used in Manchester Mark-1 computer ? it had mercury filled acoustic delay lines as accumulators.The delay line is essentially a shift register, so the data had to be recycled at every machine cycle, requiring regeneration at each pass. Now the speed of sound is temperature dependent so a self clocking would have been very nice.

Seem to recall some remote control (IR) signals do that. NEC?

Tim

-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Design Website:

The encoding scheme I am interested in is not bandwidth frugal but uses a simple ratio of low time to high time in a given bit cell (or inverted if you like). You'll need monospaced font to see this ASCII art:

__ ____ |__| |_ 1-bit

__ __ |____| |_ 0-bit

In other words, the signal always starts and ends with a falling edge. For a

1-bit, the rising edge occurs at 1/3 of the bit time, while a 0-bit rising edge occurs at the 2/3 point (or vs versa if you like).

This format is desirable for use in small microprocessors like the ATtiny13A, where all that is required to decode this self clocking signal is to time the low time vs the high time. The bit is determined by the ratio of the two durations. Because the bits are determined by ratios, it is forgiving of the RC system clocks that can be used on these 8-pin DIP MCUs.

So what I am looking for is the NAME of this line encoding scheme (surely there is a name for it). The critical element is that there is a transition at the 1/3 or 2/3 point within the bit cell.

Warren