ring oscillator

I'm not sure Occam is needed. The point of the GA144 (assuming it actually had an intended point) is that CPU resources (instruction speed) is no longer a precious resource at 700 * 144 MIPS. So you can dedicate a CPU to handling an SPI interface, or a UART, etc. They use three CPUs for the raw I/O on the memory interface and may use more to implement the "server" to share it across any CPU that wants access.

Each processor has *very* limited memory, so a given function may have to be implemented in several CPUs to get enough memory resources.

I think of the chip as a CPU analog to the FPGAs. A Field Programmable Processor Array (FPPA) if you will. Build this chip in a 20 nm process and you have something like 11664 CPUs running at who knows what speed!!!

There are many limitations and so far no fixed methodology has emerged to design with a chip like this. Everything has been seat of the pants. I think they did a 10 Mbps Ethernet interface and a few other functions (I've yet to see even a 12 Mbps USB interface).

Programming in assembly is actually not hard if you are familiar with Forth at all. The instructions are few (5 bit opcode) and there is only two or three addressing modes. In Forth subroutines are "words" which have no formal parameters, everything is passed explicitly on the stack, managed by the programmer. Not really hard, just different.

The GA144 came about by Charles Moore applying his minimalistic philosophy to CPU design. The CPU is designed to keep the implementation as simple as possible to yield low power, high speed and a small footprint, forgoing much of the usual complex features of typical CPUs. It could work if they had a large enough group of people working the software side. That is one of Chuck's limitations. He is a lone wolf who doesn't really care so much if anyone else uses his ideas.

Just in case I didn't get this across, the CPUs are essentially async coordinated only by data passing handshakes. I think I mentioned that but it is an important feature.

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Rick C
Reply to
rickman
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I have seen Spice oscillators hang at zero output, with no noise to start them up, but this one starts, after a while.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

I have used exactly that technique to *stop* a feedback loop from oscillating as an unintentional ring oscillator. Dominant pole compensation is another term for that technique of stopping it from oscillating.

Reply to
Chris Jones

If I don't want something to oscillate, the fact that it does not oscillate in spice is not evidence that it is OK. In spice, you can do the equivalent of balancing a pencil on its point, and if the rounding errors work out just wrong, the pencil will stay vertical forever. To check that something won't oscillate, I always couple a step or impulse into the signal path, and check that this does not kick-start any oscillation or ringing. Without this stimulus, one cannot tell.

Reply to
Chris Jones

Depends on the technology. Bipolar is the opposite. The bipolar mainframes had heater chips on the low power modules.

Not sure what the question is.

Reply to
krw

If you do it like a 555, then there's three equal-value resistors that define the threshold. As long as they track with temperature, the thresholds stay at fixed fractions (1/3 and 2/3, respectively) of VCC.

I don't know how they temperature compensate the resistance in the RC. Perhaps they have some magic to make it track the capacitance, or some way of making it constant. This I simply don't know (although, a capacitor in silicon has to be temperature-sensitive, too, so you can't _just_ make the resistor insensitive to temperature variations).

--
Tim Wescott 
Control systems, embedded software and circuit design 
I'm looking for work!  See my website if you're interested 
http://www.wescottdesign.com
Reply to
Tim Wescott

He's wondering how the semiconductor companies can make an RC oscillator in a processor that stays on frequency to within 2% over the whole temperature range.

I am, too.

--
Tim Wescott 
Control systems, embedded software and circuit design 
I'm looking for work!  See my website if you're interested 
http://www.wescottdesign.com
Reply to
Tim Wescott

...

There are capacitors that are not a PN junction, and which are not very dependent on temperature. The gate capacitance of a MOSFET is quite a dense capacitor, but one of the plates mostly disappears when the FET is not biased, so it looks more like a very steep varactor. If you don't want the capacitance to vary with voltage, you can dope the channel part the same polarity as the source and drain (an NMOS in a N-well). The gate oxide is quite leaky in deep-sub-micron processes but has very low leakage in 1.8V (0.18um channel length) and bigger transistors.

There are other capacitors that use metal for both plates, often called MIMcaps or MOMcaps. (M stands for metal, I for insulator or O for oxide). These have a wide initial tolerance, but decent sized nominally identical capacitors often match to better than 0.1%, and the dielectric is better than pretty much anything you can buy as a discrete capacitor

- very low leakage and excellent dielectric absorbtion. You can trim them by switching in or out sections of capacitor using MOSFETs.

Different on-chip resistors have different tempcos. Some types have positive and some have negative, so you can make a composte resistor that contains some of each type and has quite low overall tempco. You could use MOSFETs to switch in or out a portion of one type of resistor, to trim the tempco, or you could use a temperature sensor and a lookup table to digitally adjust the resistance with switches, if the discontinuity doesn't bother you.

Reply to
Chris Jones

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The frequency of a classical emitter-coupled RC oscillator depends almost e ntirely on the R and the C. The temperature dependence of the Early effect was the only other temperature dependence I could find on a discrete implem entation, and that was pretty small.

Getting a temperature-stable resistor and capacitor onto a chip might be a bigger problem.

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Bill Sloman, Sydney
Reply to
bill.sloman

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entirely on the R and the C. The temperature dependence of the Early effec t was the only other temperature dependence I could find on a discrete impl ementation, and that was pretty small.

a bigger problem.

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Reply to
Lasse Langwadt Christensen

Are there any bipolar CPUs any more?

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

Or you could trim things with the thresholds...

Thanks Chris. I gather from reading documentation that the internal RC clocks in microprocessors are factory trimmed somehow. I suspect that they do basically what you're saying.

--
Tim Wescott 
Control systems, embedded software and circuit design 
I'm looking for work!  See my website if you're interested 
http://www.wescottdesign.com
Reply to
Tim Wescott

I've loaded code into CPU's that give them some pretty severe mood swings

-- is that what you meant?

--
Tim Wescott 
Control systems, embedded software and circuit design 
I'm looking for work!  See my website if you're interested 
http://www.wescottdesign.com
Reply to
Tim Wescott

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

I missed the RC thing.

Temperature compensation. ;-) Tracking of parameters across a chip can be amazingly accurate. Devices right next to each other, even more so.

Reply to
krw

You can't possibly believe LTSpice is simulating the physics of that kluge? It's not a ring oscillator, it's a delay line oscillator. Like this:

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There are monolithic designs with fractional percent initial accuracy, proc ess stability, and performance approaching 50ppm temperature stability, and they're as much analog as digital. I don't think you can just slap togethe r some gates in an FPGA and get anything useful and reliable.

Reply to
bloggs.fredbloggs.fred

Kluge? It's just some mosfets in a repeated pattern. The sim appears to be plausible.

It's not a ring oscillator, it's a delay line oscillator. Like this:

You are playing with words. But the world recognizes what I posted as a "ring oscillator."

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If you want to get pickey, a delay line oscillator consists of a delay line and an inverter. So my circuit is both.

I recently designed a 600 MHz oscillator that uses a one-end-shorted transmission line, with a vaguely Colpitts gain stage on the un-shorted end. I did Spice it and then built one, and the Spice sim appears to be pretty good. It needed to have the min time step cranked down... I think LT Spice goes for runtime speed, so sometimes you have to slow it down. My ring oscillator behaves a little differently at startup depending on the time step, but that's no surprise.

The few cmos silicon delay lines that I've used had terrible TCs and supply sensitivity and lots of jitter. The ECL programmable lines are pretty good for jitter, but are short, expensive power hogs, and still have bad TCs.

I thought that the ring osc Spice sim was beautiful, at the initial breakout point, around 170 ns. Of course it's unrealistic, but real-life versions would not be repeatable anyhow, so there is no "accurate" simulation.

Cheer up!

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

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