I have 433Mhz RF receiver whose output is connected to the processor for d= ecoding the transmitted codes. Both the RF receiver and micro are at 3.3V l= ogic levels. Output of the RF receiver is fine (swinging 3.2V for logic HIG= H and 0V for logic LOW)as viewed on the oscilloscope and logic analyzer. Bu= t when I connect the receiver output to the GPIO input pin of the processor= the HIGH level is dropping down to 1V. i.e Logic HIGH is going up to 1V on= ly. So the processor is not recognizing the logic HIGHs. I verified the pr= ocessor GPIO input by giving it 3.3V supply as input (with appropriate curr= ent limiting resistor) and this is not going down to 1V but remains 3.3V an= d processor recognizing it as logic HIGH. This rules out any problem on the= processor side or software.
What could be the problem? Is the drive strength of RF receiver output not = sufficient for the processor input? Will the voltage drop in such a scenari= o?=20
As per the I.mx23 processor datasheet, the GPIOs can source or sink 3mA. Th= e drive strengths of the RF receiver is not available as the IC=92s marking= was erased by the module manufacturer and hence couldn=92t get the no data= sheet. Tried the connection with series current limiting resistor of variou= s values from 1k upto 1M. After around 500K the signal level increases tow= ards 3.3V but the edges are distorted. At 1M the logic HIGH gets to close t= o 3.3V but the signal and edges are severely distorted and hence not useful= .
RF receiver VDD range is 3V to 6V. So I tried with 5V supply with resistor = divider at output to match the 5V level to 3.3V level. Tried different valu= es for the output divider to convert 5V level to 3.3V level but anything le= ss than 750K for R2 (resistor to ground in voltage divider) the output does= n=92t raise beyond 1V. So used appropriate R1 with 750K for R2 to get the c= orrect 3.3V level but the signal is severely distorted as in the above case= .=20
Tried the transistor (2N2222) switch as buffer and this seem to have solved= the issue but the switching delays are altering the pulse width. Since RF = receiver output is recognized as 1 or 0 based on the pulse width this solut= ion is also not useful.
Any help is greatly appreciated. Can=92t use any buffer ICs due to board sp= ace and cost issues.=20