Reliability of microcontroller silicon die glue on top of another die

Hi

I have been looking into the GigaDevice GD32 Cortex M3 microcontroller

It has a REALLY nice price performance ratio

So I dug a little deeper, and found that they do not integrate the flash an d microcontroller on the same die as a normal microcontroller, but instead they use a single die variant of logic and core, and glues a serial flash o n top of that

Link to picture:

formatting link

It's qoute ingenious, since then they can without changing the core die jus t change flash sizes by popping in a diffent flash die

But, I am questioning the reliability of such a construction

What happens at a lot of thermal cycles, does the glue give up and the bond wires likewise?

GigaDevice has a thermal shock report that shows 0 defects after 500 cycles , which is the industry norm.

I would however like to hear if any one here has experience with that kind of construction? My feeling is that it is ok because the thermal expansion coefficient of the 2 dies are the same, so the stress on the glue is low, b ut I am not an expert at all in die and glue technology

Any insights group?

Regards

Klaus

Reply to
klaus.kragelund
Loading thread data ...

Seems rather dumb to me. What's the point? Serial flash is cheap. Just stick it on the board. The cost has to be horrendous.

Stacked chips and MCMs are one thing but this looks like a real kludge with no great advantage.

BTW, why an M3? Is it really cheaper than an M4?

Reply to
krw

Advantages: Flash is loaded to SRAM, so zero wait stage performance, almost double as a standard M3....

Reply to
Klaus Kragelund

Huh? ARMs are flash rich and SRAM poor. If you want double the performance, go to an M7. SRAM is expensive.

Reply to
krw

Den torsdag den 1. juni 2017 kl. 18.58.11 UTC+2 skrev snipped-for-privacy@notreal.com:

yeh, afair from when I was involved with something similar, SRAM is something like 4x the die area and higher standby current than flash

the though I guess some of the die area penalty might be reduced by being able to use smaller process that doesn't have flash

Reply to
Lasse Langwadt Christensen

Lasse Langwadt Christensen wrote on 6/1/2017 1:14 PM:

Is there any reason to argue the concept when the details can be viewed? Er, ah, I can't seem to find any data sheets on their MCUs. The web site is rather goofy. It has a selection guide, but once you locate a part number there are no links to more info. I found a page with data sheets, but none for the MCUs. Very strange.

--

Rick C
Reply to
rickman

You found details?

I didn't think so. The whole idea is goofy.

Reply to
krw

why?

Reply to
Lasse Langwadt Christensen

  1. It's a kludge
  2. SRAM is expensive/Flash is cheap
  3. Faster uCs are available, if necessary
  4. Off-chip flash is trivial and incredibly cheap. Bottom line: it's a solution looking for a problem.
Reply to
krw

Den fredag den 2. juni 2017 kl. 00.40.54 UTC+2 skrev snipped-for-privacy@notreal.com:

it's a solution

assuming the process supports flash

there's always faster uCs available

stacking save a package, removes the need to support multiple types and saves space on the board

I've seen other IC go from extern to internal serial flash, if it wasn't something that solves a problem why would they do it?

Reply to
Lasse Langwadt Christensen

Without a problem.

It's an ARM, ferkrissakes! If you're stupid enough to design an ARM M-series on a process that doesn't support flash, revisit your business plan. ...or use an external flash, if you're stuck on stupid.

Cheap. M7s are twice the speed of M3s. (Not sure why M3s still exist).

No, it certainly doesn't save anything. Kludges aren't free.

Because they're stoopid? Are they really doing it or is it someone's wet dream?

Reply to
krw

Datasheet:

formatting link

Price = 0.3 USD in volume, at least 25% cheaper than the STM32

The process is split, so one is logic and SRAM. The other is flash. Always cheaper to separate technologies

Operation from SRAM draws less current

Cheers

Klaus

Reply to
Klaus Kragelund

Designers use Cortex M3 and M0 to reduce cost

I really think people are stupid just to select a fast microcontroller when the application does not require so

Cheers

Klaus

Reply to
Klaus Kragelund

Klaus Kragelund wrote on 6/1/2017 7:47 PM:

WTF? You had to find the data sheet on a third party web site???

Ok, I dug a bit at gsense.com and it seems they are the parent company. How did you find the data sheet?

Where did you get a price?

Huh? Having two die is not so cheap. If two separate die are "always" better, why do they combine the Flash with CPU in most cases for chips in this range?

I don't see that in the numbers in the data sheet. ~300 uA/MHz.

--

Rick C
Reply to
rickman

Assuming that engineering cost and time to market aren't issue, that is.

Cheers

Phil Hobbs

Reply to
pcdhobbs

Always dumfounds me how some don't value their own time when making such a decision. ...Jim Thompson

-- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at

formatting link
| 1962 |

Thinking outside the box... producing elegant solutions.

"It is not in doing what you like, but in liking what you do that is the secret of happiness." -James Barrie

Reply to
Jim Thompson

So if you've got nothing to do, just use an M0.

Reply to
krw

Where?

That's certainly not true. If it were, there wouldn't be mixed technology chips.

Not buying it, at least reads (operation). Note that both are zero wait-states so no advantage there.

Reply to
krw

BTW, the datasheet claims 3MB "on-chip" flash? That's not what we were discussing (and *really* hard to believe). I shoulda checked the date on the datasheet (4/1? ;).

Reply to
krw

[about flash piggybacked on CPU die]

A 'kludge' like adding another level of cache? When the manufacturer does it for you, you TAKE it and enjoy. Intel's Pentiums got more useful when they went to the Pentium Pro and various other multichip modules.

Only in mass production. The flash requires more masks, and odd thin oxides with steps (for the floating gates) that can be omitted from a CPU. SRAM is identical to other CPU logic and registers, no extra masks or process steps. If you already have a FLASH production line, it makes sense to multipurpose its chip output for other products.

?so?

But, if there's enough ON-chip flash, some customers will pay to avoid the 'extra part'. Low power dissipation in the flash chip makes it a reasonable packaging decision.

It's an affordable upgrade from a bare-bones CPU, and when a design gets to the find-more-resources stage, this can be an easy sale. It makes business sense. It makes extra-special sense when the unexpected problem arises.

That's happened to me, once or twice.

Reply to
whit3rd

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.