A timestamper is a circuit that latches the time of arrival of a pulse edge. We use a clock and a binary counter as MC, the master counter definition of time. We extend those MC bits down into picoseconds with a time interpolator, adding 8 to 12 bits below the counter LSB.
One way to test a time stamper is to stamp pulses that are random in time, and then histogram/analyze the codes. That can catch all sorts of nasties, like stuck or shorted bits or interpolator problems; we've done the math on that. In the test set that I'm designing, I want a simple but really bad pulse generator, maybe around 1 MHz with tons of period jitter, to get good statistics and never alias against the master clock. Aliasing can make really weird histograms.
The single inverting schmitt oscillator is probably good enough, but it's fun to consider other really nasty oscillators. A bad power supply will only help.
We have an FPGA, so I guess we could build a pseudorandom bit stream, filter that a little, and use that to confuse a schmitt oscillator. The kids might enjoy programming that.