Re: Postscript Gerber driver

Apertures are the effective plotter pen size. If I do a copper pour

> with, say, 5 mil pen size, the Gerber file will be a lot bigger than > if I do it with a 20 mil aperture.

Well, when crappy old PADS makes the plot.

All newer packages make gerbers with actual polygons.

Tim

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Seven Transistor Labs, LLC 
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Reply to
Tim Williams
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Certainly NOT Eagle - where the price is new...

Reply to
Robert Baer

PADS does use multiple apertures for all layers, including pours. It does the fine stuff at the min resolution you specify for each pour; you need a really tiny line size to fill pours in between BGA pins, for example.

Since we don't use floppy disks any more, I don't care about files sizes.

The gerber set for a pretty complex 8-layer VME board, with BGAs, is about 4 megabytes unzipped.

I can't think of anything that PADS does really wrong. The schematic entry part is great.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
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Reply to
John Larkin

Copper pours can be done by defining an area on a positive layer, then addi ng the pin clearance shapes on the negative layer for the same copper. No need to draw tiny lines anywhere unless you like huge files. They are also not limited by the resolution you pick, only the device drawing the films.

This is one of those things that PADS does wrong.

Rick C.

Reply to
gnuarm.deletethisbit

Hmm, last 8-layer I did was 3MB. A third of which is the drill drawing, go figure. (Probably all those stupid line fonts and drill symbols.)

Tim

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Reply to
Tim Williams

Is PADS expensive, and what about the learning curve and limitations (board size and/or pins)?

Reply to
Robert Baer

IIRC, they've reduced the price significantly. Still wouldn't recommend it over comparably priced or cheaper packages. Even just lmtools, 'nuff said.

Tim

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Reply to
Tim Williams

They have a free version, and a cheap version, now. We paid a couple K per seat for 6 licenses, the serious versions. There are no limitations.

This is the biggest board that I've designed:

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It's the only layout software that I've ever used, so I can't compare its learning curve to anything else. Probably the library operations, creating parts and decals, are the hardest parts, but then I don't do that.

Well, I did a little ORCAD once. It was horrible. And some other schematic entry thing for FPGA design, also horrible.

PADS is a little quirky sometimes, but it's stable. I can open and modify boards that we did 20+ years ago, in the DOS version.

It can export/import anything, including libraries, in ascii, which can be very handy.

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John Larkin         Highland Technology, Inc 

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Reply to
John Larkin

If you are doing serious electronic design, the price shouldn't matter much. The time you spend designing boards will be worth hundreds of times what you spend on layout tools, so tool performance matters.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
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Reply to
John Larkin

Been using Eagle (mainly) since around 2001 but used PADS and Orcad for many years.

I love PADS and LOGIC but that newer schematic capture (?? designer ?) and the issues with getting help and renewing for help every year just to be able to ask a question pissed me off. Especially since there was (is ?) a full online forum of users for Eagle where I could get a free and almost instant answer to my questions or add my input directly to the old Cadsoft engineers adding features to the program.

boB

Reply to
boB

The PADS support people don't actually answer questions, so there is no reason to pay for support. Luckily, it doesn't need much.

We use the classic Pads Logic for schematic entry, and it's really good. We just need to be careful creating library parts to avoid jaggies.

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  
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Reply to
John Larkin

Am 20.03.2018 um 16:03 schrieb John Larkin:

I hope, PADS has an autorepeat feature in the meantime. :-)

Like <

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>

The layout can be copied automagically. <

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>

This is a preamplifier with 10 pairs of ADA4898-2 in parallel for 220 pV/rtHz voltage noise.

"rein" and "raus" are connected to all 10 pairs, ob[1..10] is a bus with 10 individual members.

In a previous life, we used DOS Orcad for circuit entry for both FPGAs and PADS layout. I even wrote an interface program to connect Orcad symbols to PADS decals and auto-massage the netlists.

DOS Orcad was the best circuit editor ever, Windows Orcad was probably the worst. DOS Orcad was a great step forward from its successor.

Cheers, Gerhard

Reply to
Gerhard Hoffmann

We do a lot of multi-channel stuff, and PADS has a physical reuse feature. Lay out one channel, and it will place any number of copies on the PCB and, if you do it right, copy the routing too.

I remember missing connections by a few pixels, so things looked connected but weren't. PADS doesn't allow that to happen.

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  
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Reply to
John Larkin

  • I agree; VERY nice - especially when one can switch from visual edit of layout to text representation edit and back. IVEX WinBoard did that very nicely; miss it as the company dies a long time ago.
Reply to
Robert Baer

One of my guys rips pin lists out of Xilinx data sheets, mashes them with Python, and makes ascii files to create Pads schematic symbols. That sure saves time when you have an 800 ball Zynq to put on a board. And there are zero errors.

The corresponding PCB decal, the 800 ball BGA, takes about a minute to create in PADS.

We can also export anything, a board or a library, in ascii, edit it locally or globally, and put it back.

Do other layout packages let you do that?

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  
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Reply to
John Larkin

Kicad does (the ascii bit) I believe.

Altium can paste pin lists directly from datasheets, you don't need the python script. You can also paste from a spreadsheet as a placed list of nets with wires and so forth if you like ("smart paste"). It's very flexible like that.

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John Devereux
Reply to
John Devereux

Yup.

I've built whole (simple and regular) PCB layouts in KiCAD by generating the ASCII using a Perl or Python script. Doing footprints would be a similar process.

Reply to
Dave Platt

Den fredag den 23. marts 2018 kl. 19.49.12 UTC+1 skrev John Larkin:

the xilinx tools can generate the ascii pin files directly from the files used by the tools instead of relying on the datasheet

kicad, I think eagle is also ascii

Reply to
Lasse Langwadt Christensen

AD18 does, but also since AD12 or so, there's been a rather complete collection of vetted libraries in the component vault. About ten seconds to look it up and place on your schematic.

Tim

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Reply to
Tim Williams

IVEX WinBoard allowed that WRT libraries. But Ivex has been dead for at least 10 years.

Reply to
Robert Baer

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