PWM generator for half Hbridge

We've had good half-bridge success with a small delays using custom-programmed ARB sequences.

Are you saying the signal generator is losing its synchronization? It's common when you have rail-rail shoot-through cross-conduction to get very short very-high-amplitude spikes, which can wreak havoc with any connected electronics.

The solution is to first remove the shoot-through. Rather than depend on external signal delays, it's useful to add a 2-input AND gate before your MOSFET driver input, and feed one of the gate inputs from a small RC delay. The gate output responds instantly to OFF signals, but delays ON signals. Do this for both HI and LO drivers.

Digital delay generator?

My P400 is such a handy thing to have around, it was worth designing for internal use.

The core problem with any pulse or digital delay generator is to reprogram the timings on-the-fly without violating causality or crashing into some internal, practical considerations. Many boxes just reset for a while when any setting is changed, and start back triggering after some milliseconds of head-scratching. That could blow up something like an h-bridge.

This is the discrete solution he wanted to avoid.

But frankly, I think it may be the way to go!

On a sunny day (27 May 2015 14:28:11 GMT) it happened snipped-for-privacy@gmail.com (alb) wrote in :

Microchip PICs have very good PWM output features.

I done this before using the PSoC 3 development kit. You don't even need programming

Cheers

Klaus

I've done that with a PSoC 3 Development kit

I had to sweep different frequencies and deadtimes, so I have a program that interfaces to the development board. If you are interested I can dig it up and send to you

Cheers

Klaus

not sure If I grapse this corrently however, I have done something with a AB generator to avoid the shoot through currents in the bridge for testing. final design took care of this in the components.

I programmed the Gate input of the generator to hold off the output between the bridge output switch while there was still a presents of a signal at the bridge output. I made a simple protective coupling circiut to tie the gate input to. Most half witted generators allow you to assign a control input, in my case it was the gate input. Jamie

OR, add supply inductance to accommodate it.

Which has advantages for reduced switching losses and EMC, too.

Tim

Hi there,

Winfield Hill wrote: []

What's an ARB sequence?

Ok, so you are saying that the loss of synchronization is an effect of the shoot-through, rather then the other way around...that's interesting, I was tempted to believe that the shoot-through was induced by the loss of synchronization.

I agree that a hardware protection on this phenomenon is the safest approach.

That is indeed a very simple mod to apply to our circuit that prevents the issue while keeping the possibility to use the Agilent to generate the modulated signal.

Without replacing the control part we will also avoid the need to reimplement the PWM signal via another tool.

Thanks a lot!

Al

Hi Tim,

Tim Wescott wrote: []

I agree, indeed I wanted to avoid a custom built unit to implement the whole chain (waveform, PWM, delay). Given the proposed approach only costs (time wise) two AND and a couple of RC, I guess it'd be the most cost-effective solution.

Al

Hi Tim,

Tim Williams wrote: []

I'm not sure I followed...We have large caps to provide energy during switching, where would you add the inductance? And how this can mitigate the switching losses?

Al

Furthermore, it's not so much the switching losses at issue (they may not be very high due to the short-term nature of the shoot-though), it's the momentary high currents that flow, causing induced EMFs, and all kinds of trouble. I don't see a good place to put an inductor to fix that.

in some old philips appnote there was examples of putting inductance either in the supply after the capacitors or in the source of the upper FETs, doing double duty as reducing shoot-through and slowing down short circuit peak current

-Lasse

This thing is too cool to miss it actually. I guess that for the specific application the suggestion to go for the AND gates is still simpler, but I'll have to keep this kit in mind for the next bench.

It's a shame their development environment does not support GNU/Linux, I always feel constrained in a Windoz environment.

IIUC you are having trouble when or after the duty cycle has changed.

For a 80kHz PWM you need a blazingly fast timer if a somewhat reasonable granularity is needed. Shoot-through protection requires dead time and you'd need several capture-compare registers to do it. Suggestion:

CC1: Sets high phase on output 1. CC2: sets dead time from output 1 high to output 2 high. CC3: Sets high phase on output 2. CC4: Sets dead time from output 1 high to output 2 high.

The software that controls this needs to run a totalizer which always keeps track and makes sure its equalizes so no charge pumping occurs. Similar to gyro navigation.

You'll probably still need some mechanism to bleed off minor charge accumulation but that could potentially also be SW-controlled.

Hi Klaus,

Klaus Kragelund wrote: []

Thanks a lot for the offer, we'll wait for the mod with the AND gate and see how it goes.

I actually just found out that some colleague of mine has already used the PSoc 4 Development kit to do some testbench and it looked pretty simple to configure.

Al

Best use Schmitt-trigger AND gates, though.

If you monitor the output currents, you can adjust accordingly to yield zero average current

Cheers

Klaus

Yes, that would be the regulator loop method but as AFAIU Al wants something without any additional external parts.