We make a lot of weird products, in VME and little Ethernet boxes. They use D25, D37, SCSI50, SCSI68, and D9 i/o connectors. Some products follow sorta repeatable channel/pin assignments, and some don't.
We now have a motley collection of test sets and fixtures, some historical creaky DOS/ISA/Bit3 stuff. The new regime will be one universal test box, and Ethernet connection to the test gear, code in Python.
We'll use a Fluke benchtop DVM (the Keithleys suck) and an Agilent SMU (the Keithleys suck) and a rackmount scope, probably a Rigol. Maybe an ARB, again a Rigol.
My assignment is to design the main board, which is basically a relay matrix. It goes something like this:
There are 68 "PinN" signals, all used on a SCSI-68 connector and less used on others. Each pin has three DPDT relays so it can be left open or connected to one of five internal busses, A B C D or E. Some of the pins can also be locally grounded; there are reasons to do that, trust me.
Then there is a "test matrix" that can ground the busses, short them, and connect them to the test equipment. More relays. There are also eight resistors that can be connected to A B C D in 4-wire mode, or fake 4-wire mode for the higher values. They simulate RTDs and such.
An ARM cpu manages it all, actually pretty simple since it mostly clicks relays. It's looking like I'll have about 260 relays on the board.
We'll use the TI TPIC6595 SPI relay drivers.... 32 or so of them. I figure that if I allow the Fluke to monitor the +5 supply current, we can check the coil currents and verify that the shift register and coils are OK. Actual verification of the entire test set will require some loopback connectors, which can be little paddle boards.
A test stand will need two of these boards, since many of our products have two i/o connectors.
We can build a dozen of these boards, and keep spares in the closet. Three reels of relays ought to do it.
I wish I could buy a universal crossbar switch!