Precision synchronous demodulator

What's a good approach for use at 1MHz, give or take 2:1?

Things like the AD630 are slow, and my usualy go-to approach (Gilbert Cell balanced demodulator with LO >> Vt) has input referred drift and offset typically in the ~1uV/K and a couple mV. I'd like both to be better by at least an order of magnitude, and preferably with some gain like the Gilbert cell things, which have 15-20dB of gain.

Analog switches have negligible offset- how much trouble will all that charge injection (~4pC for a good one) cause at 1-2MHz?

Best regards, Spehro Pefhany

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Reply to
Spehro Pefhany
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How about a AD8551? 1uV offset and 5nV/C. $1.84 at Arrow:

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Get the signal up out of the noise then use any analog switch to suit.

JK

Reply to
John K

Oops - thought you were interested in DC. Same principle though. If you are demodulating a weak 1MHz signal, use a low noise amplifier to boost it, then chop.

OTOH, the Tayloe demodulator might be interesting. Using a LT1115 preamplifier at the output, it can get down to 17.3 nV or -142.1 dbm for

3dB SNR in 1KHz bandwidth:

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I don't know how long until his patents expire, but you might ask. Since he has promoted it so widely in ham use, he might be willing to let you use it for a nominal fee.

Another alternative is the H-Mode mixer, invented by Colin Horrabin, G3SBI. Martein Bakker, PA3AKE, has done extensive research on it. The site is

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JK

Reply to
John K

Hi, John:-

The demodulator (and following LPF) will eliminate low-frequency noise (including DC offset). We'll be operating well above the 1/f corner on the power spectral density plot of the amplifiers, so amplifier TCVos and Vos really don't matter until you run out of headroom.

The purpose of the demodulation is to accurately recover a very small signal buried deep in noise. Think old-school analog lock-in amplifier (no modern ADC->DSP/FPGA digital signal processing) with a relatively large 'dynamic reserve'. Before demodulation we can only amplify signal+noise, and you can't let that clip or you lose the signal (and it shouldn't distort too much or accuracy is lost).

Best regards, Spehro Pefhany

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Reply to
Spehro Pefhany

Has anyone tried using a fully-balanced system to null the charge injection?

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Reply to
Adrian Tuddenham

You mean like a diode ring modulator?

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Reply to
Jasen Betts

Yes, I guessed you were interested in detecting a weak signal, so I appended some info on the Tayloe and H-Mode mixers. These have pretty good MDS (minimum discernible signal) and excellent dynamic range, perhaps 120dB or so. They are limited by the noise floor and large signal handling of the following amplifier stages. Charge injection does not seem to be a problem with these approaches.

Your application is quite similar to sensitive receivers, except you probably don't have strong adjacent signals to cause intermodulation. But you will be sensitive to phase noise from the local oscillator which may also limit the performance.

Another thing that may help is to use a transformer at the input to boost the signal before detection. You are apparently interested in a narrow band of frequencies, so a tuned input might even work.

This is one of the most interesting design challenges - detecting a weak signal that can have a wide dynamic range.

JK

Reply to
John K

Yes, it's interesting to see that circuit-- thanks very much for the link. I was thinking of something along those lines with a SPDT switch and a zero-drift instrumentation amplifier at the output.

Crystal oscillator, so I don't think so.

Got all of that, and more. The input BPF can't be too narrow bw, for obvious reasons.

"May you live in interesting times" is allegely a Chinese curse, but apparently there's no evidence of that source, according to Wikip*dia. They do list this one "May you come to the attention of important people", which is suitably ominous.

Reply to
Spehro Pefhany

A cheap crystal oscillator can have terrible phase noise at 1MHz. Low phase noise is an art. A good crystal can cost an arm and a leg.

You need to know the amplitude of the noise in nanovolts per root Hz at the operating frequency, then compare that to the phase noise from the crystal at the same frequency. If the crystal noise is equal to or higher, you may need to find a better oscillator.

JK

Reply to
John K

Can you bandpass filter some first? That would directly take burden off the synchronous detector.

There are cmos switches rated for below 1 pC injection. And they have a common-mode voltage sweet spot, where injection crosses through zero. You can tweak the power supplies so's to operate there.

There should be some clever dual-path sync demod architecture that cancels most charge injection offset errors. Build two identical detectors and feed them antiphase signals and take the difference, something like that.

Phemts have absurdly low capacitances and especially g-d capacitance. There may be something there.

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John Larkin                  Highland Technology Inc 
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Precision electronic instrumentation 
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Reply to
John Larkin

I was thinking of doing something with CMOS where the signal is balanced and any charge injection on one leg is precisely balanced by charge injected into the other leg. The shorter transition time of CMOS switching should give lower noise than a diode ring modulator and there is no chance of unbalaced D.C. injection from the control waveform into the signal.

My particular application could be in modulating audio with a non sinusiodal waveform by pulse-width modulation, but the charge-balancing principle should work equally well at R.F.

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~ Adrian Tuddenham ~ 
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Reply to
Adrian Tuddenham

Yes, I have a 2nd order BPF. Q is not very high. An all-pass such as Bill suggested might make sense in this case.

That's an interesting technique.

I'm thinking the glitches will only cause major troubles if there is nonlinearity.

I guess I could make a fully-differential output amplifier (or use an ADC driver chip) to keep the signals closely antiphase. Or (horrors) use a little RF tranformer with a grounded centertap.

Aren't they leaky? That could screw up the DC performance.

Reply to
Spehro Pefhany

The effective bandpass of your system will be tiny. You need the get the phase close at the demod frequency, but that doesn't need an all-pass. It's customary to trim the digital clock phase to match the analog paths. Cos is flat on top, so small phase errors have a tiny effect on gain.

The usual hazard is DC offset, and offset vs temperature.

Oh, beware of charge-injection spikes getting into opamps, into their inputs or their outputs. That can cause bizarre problems.

They don't have to be very closely antiphase. A modest amplitude or phase error will just make a small gain change.

Well, yeah, microamps maybe.

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

Sure, all the time. The late lamented Si8601 quad MOSFET was amazing for that.

Cheers

Phil Hobbs

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Reply to
Phil Hobbs

Fun, I don't have any suggestions though. :^( You'd think someone would make a faster AD630.. but I couldn't find one on digikey. (maybe I don't have the right search term.) For the Gilbert cell I assume you're talking about an analog multiplier. I've used the AD734.. good to ~10MHz, you could trim out the offset with a (gack) pot., but the drift remains.

So rolling your own switched gain stage. I assume there is a preamp so you can keep the impedance down... still it looks like ~uA's of current. Jamming on JL's dual path approach, maybe have one path that does the charge injection offset, (grounded input) that later gets subtracted from the signal. (Or a single path, but every once in a while ground the input and measure the offset? Kinda a double lockin)

Any idea how they do it in fast lockins? (SRS or Zurich)

George H.

Reply to
George Herold

You've probably already considered this, but the best low-offset multipliers I've found all live in digital hardware, and work on a data stream that's been run through an ADC.

Take an ADC that has good linearity, sample your signal at the absolute fastest that the ADC will go, decimate it if necessary in digital-land, then do the demodulation as a multiplication-and-sum in an FPGA, DSP, or ordinary processor.

At your speeds, you're probably at the dividing line between a really hard-working DSP chip and an FPGA that's loafing along. I'd go with the FPGA if I could find the talent to do the implementation; if I couldn't then I'd flip a coin between trying to cram it into a DSP, or using my own inexpert FPGA skills to make it work in that realm.

--

Tim Wescott 
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Reply to
Tim Wescott

Le Mon, 23 Sep 2013 11:31:12 -0400, Spehro Pefhany a écrit:

I mentioned exactly that a few years back here, when doing my pV/rtHz preamplifier. Could bring charge injection into the fC range.

For some other interesting aspects, have a look at the "Win, where do they all come from ? (e-)" thread, back in 2006.

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Thanks, 
Fred.
Reply to
Fred Bartoli

Make balanced mixer with analog switches or FETs. Those things work very well. Further improvement is using X^3 balanced mixer rather then X^2; so your LO would be running at 1/2 frequency of the signal. Those mixers are good as they don't have any X^2 rectification effect neither on signal nor on LO input.

Vladimir Vassilevsky DSP and Mixed Signal Designs

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Reply to
Vladimir Vassilevsky

I know a good contract FPGA guy in San Diego.

--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

Thanks, Tim:-

Yup, have that concept working elsewhere in more than one design (using FPGAs). This one is a quickie design- analog + some supervisory digital.

Reply to
Spehro Pefhany

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