PLL synthesizer chips

By "fractional-N" do you mean f/1.5, f/2.5, etc?

Reply to
Tom Del Rosso
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John's comments about DDS spurs shows the limits of his knowledge. Close in spurs are not inherent in DDS designs. The usual culprit is excessive truncation of the phase word input to the sine generator giving unacceptable levels of phase noise. If you design to a spec, then the sine generator input size can be selected to meet that spec.

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Rick C 

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Reply to
rickman

The new synth chips are pretty good, but I wonder if they can really compete with the best designs for phase noise, spurs, ADEV, resolution, settling time, and so on.

You have stated your noise floor is around 1 ps rms. I believe that is the limit of your old TEK sampling scope, and I recall some photos you showed of noise measurements made many years ago.

With a 1 ps noise floor, you are not going to be able to tell the difference between some of the new designs. You need to up your game to a better level.

"Picosecond Timing" is old 1970's technology. You need to be in the femtoseconds to impress anyone today.

Reply to
Steve Wilson

On a sunny day (Fri, 20 Oct 2017 13:49:00 -0400) it happened "Tom Del Rosso" wrote in :

yes

There some C test code I wrote for it on my site, for the ebay version of their evaluation module

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sets all the registers etc etc.
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Options # ./ADF4350_test -h

Panteltje ADF4350_test-0.2 Usage: ADF4350_test [-0 0xyy] [-1 0xyy] [-2 0xyy] [-3 0xyy] [-4 0xyy] [-5 0xyy] [-h] [-v]

-0 0xyyyyyyyy register 0 32 bit hex value, if any register is specified, then the other registers also need to be specified.

-1 0xyyyyyyyy register 1 32 bit hex value.

-2 0xyyyyyyyy register 2 32 bit hex value.

-3 0xyyyyyyyy register 3 32 bit hex value.

-4 0xyyyyyyyy register 4 32 bit hex value.

-5 0xyyyyyyyy register 5 32 bit hex value.

-a nnnnn INT integer part feedback dividion factor, range 23-65535 for 4/5 prescaler, 75-65535 for 8/9 prescaler, default 24020.

-b nnnn FRAC numerator of fraction that is input to the delta sigma modulator, range 0 to MOD - 1, default 0.

-c bool PR1, dual modus prescaler select, takes clock from VCO and divides it down for counters, 0=4/5, 1=8/9, use 1 above 3 GHz, default 1.

-e nnnn MOD, range 2-4095, fractional modulus. This is the ratio of the PFD frequency to the channel step resolution on the RF output, default 1000.

-f n low noise or low spur select, 0=low noise mode, 1=reserved, 2=reserved, 3=low spur mode, default 0.

-g n mux out select, 0=3state, 1=Vdd, 2=GND, 3=R divider, 4=N divider, 5=analog lock detect, 6=digital lock detect, 7=reserved, default 3.

-h help (this help).

-i n reference doubler, 0=disabled, 1=enabled, default 0.

-j n reference_divide_by_2_bit, 0=disabled, 1=enabled, must be 1 for cycle slip mode, default 0.

-k nnnn R counter, input reference frequency divider, range 1-1023, default 250 for 100 kHz to phase comparator.

-l bool double buffer output_divider_select, 0=disabled, 1=enabled, default 0.

-m n charge pump current Icp in mA in 5k1, has effect on spectral width, 0=.31, 1=.63, 2=.94, 3=1.25, 4=1.56, 5=1.88, 6=2.19, 7=2.5, 8=2.81, 9=3.13, 10=3.44, 11=3.75, 12=4.06, 13=4.38, 14=4.69, 15=5,default 0.

-n bool lock detect fraction, 0=fractional N, 1=integer N, default 1.

-o bool lock detect precision, 0=10ns, 1=6ns, default 0.

-p bool phase detector polarity, 0=negative, 1=positive, default 1.

-q bool power down, 0=normal operation, 1=power down, default 0.

-r bool charge pump tristate, 0=disabled, 1=enabled, default 0.

-s bool counter reset, 0=disabled, 1=R and N counter are held in reset, default 0.

-t bool cycle slip reduction, 0=disabled, 1=enabled, default 0.

-u bool reserved.

-v n verbose, range 0-3, prints functions and arguments.

-w n clock divider mode, 0=clock divider off, 1=fast lock enable, 2=resync enable, 3=reserved, default 0.

-x nnn clock divider value, range 1-4096, default 1.

-y bool feedback select, 0=divided, 1=fundamental, has effect on spurs, default 1.

-z n VCO output divider select, 0=/1, 1=/2, 2=/4, 3=/8, 4=/16, default 0.

-A nnn band select clock divider value, range 1-255, default 1.

-B bool VCO power down, 0=VCO on, 1=VCO off, default 0.

-C bool mute till lock detect, 0=disabled, 1=enabled, default 0.

-D bool aux out select, 0=divided output, 1=fundamental, default 0.

-E bool aux out enable, 0=disabled, 1=enabled, default 0.

-F n aux out power in dBm, 0=-4, 1=-1, 2=+2, 3=+5, default 0.

-G bool RF out enable, 0=disabled, 1=enabled, default 1.

-H n RF output power in dBm, 0=-4, 1=-1, 2=+2, 3=+5, default 0.

-I nnnnnnnn reference frequency in Hz, default 25 MHz.

-J n lock detect pin operation, 0=low, 1=digital lock detect, 2=low, 3=high, default 1.

-O nnnnnnnnnn output frequency in Hz, range 135 kHz to 4.4 GHz, default 2,400,000,000.

-R nnnnnnnn frequency resolution in Hz, range 1kHz-10MHz, default 100 kHz.

-Z n program mode, 1=calculate frequency, 2=calculate registers INT and FRAC and program chip, 3=program chip from registers, 4=I/O test, 5=send registers as specified with -0 to -5, default 2. Defaults are for a 25 MHz crystal and 2,402,000,000 Hz output.

Have not used it a lot, just for some frequencies, those work OK. There is also Analog Devices C code on the net that I have used.

Reply to
Jan Panteltje

It used to refer to pulse-swallowing, as in some inner loop with a divide-by-ten that sometimes can be made to divide-by-eleven. It's a cause for jitter, of course, compared with integer-N division schemes, but resolution is nearly unlimited.

It doesn't need to be a neat fraction, but a set-and-forget variant will be (just because all rational numbers are achievable, doesn't mean irrationals are, in a finite number of settable registers).

Reply to
whit3rd

Traditionally the fractional N type PLL used two counters, one for the primary divide and another that would trigger the extra pulse. A rather simple extension of this is the NCO with a modular adder and a step size. This makes programming very easy with a simple relationship between the main clock rate and the resolution of the frequency word.

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Rick C 

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Reply to
rickman

They sure seem to blow away generators that were big and expensive 10 years ago.

We used our LeCroy 760Zi for that synthesizer jitter test; it cost us $50K a couple of years ago. It specs 1 ps RMS typ, 100 fs in "enhanced" mode, which I haven't tried.

Our new dflop-based test set will have around 50 fs of equivalent jitter measuring delays, but it can't measure a free-running synth. But 1 ps RMS is good enough for our needs.

What sorts of jitter measurements do you do? What's your measurement floor?

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  
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Reply to
John Larkin

N/M?

Reply to
krw

Based on what evidence? How do you meaure it?

I seem to recall a spec for your delay generator of 1 ps resolution and 10 ps rms jitter. That is rediculous.

Why spec 1 ps when you cannot guarantee it?

Currently 5370B. Working on fs with arbitrary synthesized sources. This is a big job and requires significant development work.

Phase noise is an important tool. Gerhard showed how to measure below the thermal limit. John Miles designed the TimePod which uses cross-correlation to measure very low jitter. Rubiola has many useful articles on noise and correlation issues. Many other authors have contributed significant information on reducing noise and jitter.

The first problem is the need for very low noise oscillators. The Colpitts designed for low drift may not be ideal for phase noise. There are better approaches.

The next problam is measuring the noise. You need to be able to measure arbitrary frequencies, not the dflop system you have to measure delays. Who cares if a delay changes by 50 or 75 fs?

Your technology is limited by the precision and accuracy of your measurements. You have stopped any progress in your field.

Reply to
Steve Wilson

Huh, Steve I've never done a PLL, and only a few oscillators, but if you've got a feedback loop, then sometimes it's good to have things faster and not as stable. I've mostly got a thermal analogy in mind. A BIG piece of material, that takes a long time to get anywhere, but is hard to move once it get's there. Versus something smaller, quicker. This assumes some stable reference. I guess a lot depends on the frequency spectrum of the noise/ interference one is trying to get rid of.

George H.

Reply to
George Herold

The checks all clear. Some customers pay cash in advance.

The 5370 is seriously ancient; there aren't many around that still work. The jitter floor is usually around 30 ps RMS.

You have joined the gang of people here who don't care about electronics, just want to be obnoxious. I assume that you can no longer get away with that around real people, so you come to a newsgroup to be a jerk.

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John Larkin         Highland Technology, Inc 

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Reply to
John Larkin

LOL. Look at the references I gave. You will need these to make any progress in your business.

Look at what happens to companies who stop improving their technology. Your comment "good enough for our needs" is a clear signal.

Reply to
Steve Wilson

A chip with output 2.2GC to 4.4GC? Are you serious?

Reply to
Robert Baer

Most military stuff seems to run on 400Hz.

Reply to
Robert Baer

The stuff that flies does. The Navy uses 60 Hz on ships.

Wild Power is what you get on a plane when you are grateful to have anything, like from an APU or a ram air turbine.

At a 50 KHz IRQ rate, and a 10-bit DAC, with a tacky 3-pole lowpass filter, the stuff below 1 KHz is essentially perfect. At 5 KHz, you start to see slightly raggedy sinewave peaks, a few tenths of a per cent maybe. That's the 45 and 55 KHz aliases sneaking through the DAC sinc function and the lowpass filter.

I'm trying to get my ARM guy to do the DDS thing at 100 KHz.

--
John Larkin         Highland Technology, Inc 

lunatic fringe electronics
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Reply to
John Larkin

On a sunny day (Fri, 20 Oct 2017 22:46:29 -0700) it happened John Larkin wrote in :

I worked in a company next to the main railway station, and we had 400 Hz or thereabout interference in the whole building from that place. You could just pick it up with a simple loop. At one time I had to test something and the only place where we could still do the measurement was in some hallway where the 400 Hz was low enough.

Reply to
Jan Panteltje

On a sunny day (Sat, 21 Oct 2017 03:35:19 GMT) it happened Steve Wilson wrote in :

Ho, in defense of JL, he makes actual circuits, and sometimes publishes those here. REAL tronix, from you, as well as Billy the Slowman all I see is references to other's works and / or a long ago past. Can you [even] build a crystal radio, and show it to us here? I learned a lot from JL, really, from you I am trying but so far no luck.

OTOH nano pico femto, with a government that builds a large ignition facility that does actually nothing, same for CERN, ITER, micro is good enough ;-)

I guess we need to go beyond femto when the 4 D smartphone connected by optical links becomes more common. No kidding, I was looking up some coding systems and you would not believe the strange ideas, GHz THz, light, image a satellite sending light down to the satphone. Return link a small LED on top of your phone? Clouds? Those never happen, maybe IR, now there you have it. nm commienukeaidtion

Sorry

WTF

Reply to
Jan Panteltje

I sort of design in public. Not many people can do that. I figure that some kids out there might like to see the actual process happening, between their courses on social justice and art history.

I participated in designing the master timing system for NIF, the laser fusion thing in Livermore. We made the delay generators. They fire about 2000 client devices spread over about 7 acres. The whole system timing budget was 100 ps, of which they only gave us 10.

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The NIF people were great to work with; fun, smart, constructive.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
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Reply to
John Larkin

Civilian aircraft, too, I believe.

Reply to
krw

On a sunny day (Sat, 21 Oct 2017 07:59:17 -0700) it happened John Larkin wrote in :

Yes it is a TECHNICAL achievement. Same for CERN, and a whole (electronics) industry fuels it, or is kept alive by it.

But some scientist (NIF) already predicted long ago it had no value, is just a brain-fart dreamt up toy. Same of ITER (in France), will never have break even fusion. Same for CERN, they must be really not quite awake if they think that crashing 2 Teslas at 1000 km/h (or mp/h) into each other will give you a deeper understanding of its auto-pilot...

It is job creation, that is all. CERN the same, never did anything except one of the guys there came up with html :-) html changed the world.

I am not against fundamental research, but the way they go about it is not in any way intelligent.

You may just as well have those white coats play ball.

In The Next War - and that is why we have those - things that work will be used.

There was a discussion here about German technology just before and during WW2, submarine communication, etc, in a way fascinating, even from todays POV.

But almost like nothing changed for the US military / Navy, lots of super vulnerable steel heaps. You will lose.

Trump a pawn in the play of MIC, a weapons salesman.

Do people like that clown ever read history? Can he even read? Now he is blowing smoke again saying he will release JFK papers...

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No end to that media play. In the mean time he is a failure. An other hacker warning, did you know your utilities could not be hacked before it had the tronix control it?
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REALLY, Hollywood makes much better shows than your gov.

Yes I have read you links. That award is nice.

Reply to
Jan Panteltje

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