Could some electronics guru please provide some hints about what might be yhe problem in the following setup ?
First I SPICE simulated a simple sertes circuit consisting of a signal source (referenced to ground) connected to a capacitor, follwed by a series resistor and finally a capacitor to ground. Both capacitors are non-ideal(includes ESL, ESR). This is a very simple model of capacitive coupling. With a signal of 6V
60Hz sine wave, transient analysis provides very good results. The capacitance values are approximately 10.0pF and the resistor is 5K.Now, as an experiment, I hand constructed the two capacitors with single layer copper clad board, separated by a phenolic sheet
3,0 mm thick. The dimensions of the copper area of Each of the single layer copper clad pieces is 2 cm x 2 cm and four 2 mm diameter stainless steel screws hold the three pieces(2 capaciror plates and insulator) firmly together. Using a relative permittivity of 8 for phenolic, the capacitance value is 9.44pF for each capacitor.I connected a signal generator set at 100 Hz,
6V sine wave to the circuit described for the SPICE simulation, with my homebuilt capacitors and a 5K resistor, and read 0.0 Volt AC at the resistor terminal -- the SPICE simulation showed 5.094 Volts. Given that a capacitor is a short to AC, what could be the problem ? I understand that polysttrene capacitors are ideal for AC operations, but this setup ought to show some results. I repeated the experiment with a 6-0-6 500 mA output transformer, but there was no chnage.Any hints/suggestions as to what the problem might be would be greatly appreciated. Thanks in advance for your help.