PING: Phil Hobbs, JFET Noise

Phil, What makes a JFET less noisy than a enhancement mode CMOS device?

Would a depletion mode CMOS device be quieter? ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson
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At some point I remember reading (AoE?) that there was more 1/f noise in MosFet's... more crud in the gate or something like that. It seems like they are getting better and better at that... Nice Cmos opamps these days. But still not as high a voltage as Jfet's... I don't know why that is.

George H.

Reply to
George Herold

[snip]

I don't need high voltage, my supplies are +3.3V/-2V ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Jim Thompson

The gate of a MOSFET is at the surface (and so is the channel); for a JFET, your gate and channel are under the silicon surface. Dirt on the surface is a major concern (and, of course, not repeatable nor easily specified).

Reply to
whit3rd

I don't know in any great detail. The physics of the carriers in the channel will be vaguely similar except that there's no chemical potential to drive the formation of a depletion region there is with a JFET or BJT. I suspect that there are a lot more traps and surface states when you have all those layers that the E field has to go through, compared with a nice buried epitaxial junction.

That's backed up by the horrible 1/f noise of MOSFETs, but of course "traps and surface states" is the solid state guy's version of "market sentiment and program trading" on the Friday stock market report. ;)

Cheers

Phil Hobbs

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Dr Philip C D Hobbs 
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Phil Hobbs

Jim, you really should get yourself a copy of AoE III and read chapter 8. There we have loads of details about what other IC op-amp designers have been able to accomplish with their fabs. It's 120 pages of good low-noise stuff. You can compare JFET and CMOS, including 1/f noise breakpoint frequencies, and you can quickly compare low- and high-voltage processes.

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    - Win
Reply to
Winfield Hill

I have a copy... but I've just skimmed it... too busy with real work... finally!!

Super!! I'll read Chapter 8. THANKS! ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Reply to
Jim Thompson

You can skip to Table 8.3, page 522 or thereabouts.

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 Thanks, 
    - Win
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Winfield Hill

Do you address which companies provide foundry services? ...Jim Thompson

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| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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Reply to
Jim Thompson

It would be sort of interesting to look at the noise behaviour of lateral MOSFETs with their back gates pinned out separately. I bet the

1/f noise would be a lot less if you ran the back gate at the edge of forward bias. That would force all the channel conduction to happen well away from the Si-SiO2 interface.

You can't get those parts any more, of course.

Cheers

Phil Hobbs

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Dr Philip C D Hobbs 
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Phil Hobbs

Joerg recently pointed out a device that is still available (SST211).

Reply to
Chris Jones

Interesting, thanks.

Cheers

Phil Hobbs

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Phil Hobbs

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