Newer Model Instrumentation Amp

Both Analog Devices and Linear Technology offer a variety of in-amps. I haven't kept up with ADI's latest offerings (I work for them, but in another area) but you might look at things with part numbers like AD86XX, these are newer devices. I don't follow LT as they don't compete with the stuff I work on.

The parts you're familiar with may be in DIP packages - not many new parts are available in that type of package, surface mount has become the norm. Perhaps what you're using is available in SM, that form- factor will certainly have a longer production life than DIP. You might try that route first if your design is otherwise satisfactory. Always better to use something known to work than to try to "improve" it, that can often lead to unexpected adventures.

Do you really need maximum gain of 10,000 for EEG? And when did Qualcomm get into the brains business?

Steve

Steve

I recently finished updating our Selected Instrumentation Amps table for H&H AoE III. Except for low-voltage-process designs, I did not notice a lot of new activity in the last 15 years. Most of the classic parts are doing fine, especially if they're available in small SMT packages.

Commenting on your choices, but for gains up to 1000 (most of the data sheets don't address G=10k, that's a lot in one stage).

The AMP01 comes in a large awkward package, but it seems to do well at very high gains. However, it didn't make our list. I wasn't able to find distributor inventory. Lack of interest? The INA114 is rather slow at high gains, the INA128 has similar input characteristics, but is about 10x faster at high gains. Both are fine at distributors, maybe the INA128 has the edge.

The AD620 is a respectable part, popular, inexpensive. But its 80dB CMRR at 10kHz pales compared to the INA128's 105dB. The AD8221 is similar to the AD620, cheap, with 87dB CMRR. The AD620 and AD8221 both let you directly bypass the input transistors for RFI suppression. The INA128 may as well, but TI hides the circuit details from the engineer. Too bad.

You might want to consider some JFET parts. JFETs usually do better than bipolar in the ignoring-RFI department. The AD8220 is interesting, inexpensive, but for some reason distributors don't have any stock. Sold out? It does well for bandwidth at high gains, but not so well for CMRR at high frequency. The venerable INA110, for example, beats the pant off of it.

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On a current design, I had to make my own. I wanted lots of overvoltage protection, logic-switchable gains from 0.05 to 256, high precision, and at least +-12 volts of common-mode range, 120 dB CMRR at high gain. I wound up with a classic 3-opamp diffamp, using an LT1124 dual opamp, four Supertex depletion mode fets for protection, a discrete string of thinfilm resistors, one DPDT gain switch relay, two analog muxes, and an INA154 as the second stage. Two tiny trimpots tweak cmrr. Times 16 on one board. I'd love to get all that in a SO-8!

John

Indeed.

What was its CMRR at 1 and 10kHz, that's a tough region.

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 Thanks,
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Maybe different in your case because you guys make low-volume specialty equipment, and I have never designed an EEG. But I did design ECGs and not in my wildest dreams would have considered instrumentation amps. They are IMHO way overpriced, at $3-4 and up. I like to do that for less than a buck :-)

Sometimes it may pay off, while thinking about a change anyhow, to ponder whether a transition to jelly-bean parts might make sense.

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I'm after common-mode rejection for reasonable ground loops (DC, 60 Hz, mild harmonics) and volts of DC from load cell bridges. We tune the CMRR with a 10 volt p-p, 100 Hz square wave applied to both inputs, and the residual, as you turn the tweak pots, looks pretty square. We are currently applying the square wave and looking at the IA output with the gain set to max, using signal averaging on a scope at 2 mv/div, which is 8 uv/div relative to the input. Seems to work. I want to do it all in software, with a lockin-type thing, based on reading our ADC and synchronously detecting it against the cm square wave; if we sell enough of these, it might be worth writing that code.

Here it is:

The analog stuff pretty much just worked. The big problems were

1. The AD7699 ADC data sheet is, to be polite, terse. The differential inputs are unusual. It is just barely possible, or maybe according to the specs impossible, to actually run it at 500 KHz. A timing diagram might be helpful.

1. I rashly promised 8-pole digital filtering down to 1 Hz, Bessel and Butterworth. That turns out to be non-trivial when you get to

500,000:1 sample/cutoff ratio. Three architectures later, one consultant hired/paid/dumped, great amounts of experiment and simulation and debate, it seems to work. That adventure deserves a thread of its own. One hint: the classic DSP butterfly filter explodes at ratios like this.

1. The lead customer liked the filtering concept so much he asked for two independent filters per channel, one for the realtime data and another for the FIFOs. That's 32 filters and 16 4Kx16 FIFOs and lots of other junk in a Spartan6/45.

2. The Xilinx software is a train wreck, which greatly complicated 2) and 3). Rev 12, supposedly the one that supports Spartan6 properly, is worse than 11. You say "place that flipflop in an i/o block" and it says, after considering the request for five or six hours, "drop dead." We may start using Altera for new designs.

I'm tweaking the rev C board layout and finishing up the firmware this weekend. I get interrupted too much at work to let me concentrate on stuff like this. I can't multitask and get serious work done.

This is Fathers Day and it's been Meat Weekend. Rubbed Tri-tip last night, BBQ ribs tonight. Nothing green in sight.

John

If that's not a proprietary design John, any chance of posting a link to the schematic?

Paul Hendersen

Yes, it is proprietary but, hell, I *am* the boss, so here it is:

ftp://jjlarkin.lmi.net/22S490B_ch12.pdf

in hopes that it will invoke an entertaining flurry of pecking and clucking.

I don't totally like the style of the schematic; I drew it on D-size vellum "my way" and The Brat entered it into PADS. It would be too much work to push 16 channels of stuff around at this point.

John

[snip]

Well? Peck! Peck! Cluck! Cluck! If there's anything creative there I don't see it. But it does keep the young bucks uneducated... and that's the important part for my personal economy ;-) ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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            Where is Joe McCarthy when you need him ??

Clucking_mode=on.

Doesn't your common mode rejection depend on the tracking of the two DACs/resistor strings?

I've done something similar, but with R407, if I understand the design correctly, being controlled (ADI 1024-tap digi-pot, in my case), rather than the two feedback resistors. In my case, the common mode rejection depends on the two fixed feedback resistors, which is simpler. Of course the gain is backwards, but that's the DSPs job. ;-)

Agreed. ;-)

DACs?

I looked into using digi-pots as the CMRR trims, but they had poor resolution, poor TCs, and/or tons of capacitance. Plus, we were almost out of digital interface resources. The trimpots we're using are about the size of a 1206 resistor.

John

That bipolar relay driver is a thing of beauty.

Best regards, Spehro Pefhany

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Resistors + switches = multiplying DAC

The point is to not need trimming, particularly gain sensitive trim.

;-) ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
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            Where is Joe McCarthy when you need him ??

Sure is.

But John calls them "K", as in kontactor or kool kampground :-))

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Oh, well, OK. I like to think of them as resistors and switches.

I don't think the resistor values matter. Imagine applying, say, +5 volts to both opamp + inputs. Each opamp forces its own - input to be

+5, too. So every point along the resistor string must be +5, and the opamp outputs are +5, so there's no difference applied to the INA thing, regardless of the resistor values.

I don't know how to get 120 dB CMRR without trimming something.

Gains and offsets are tweaked digitally in the FPGA, based on cal factors stored in eeprom. Every range of every channel has its own zero and gain cal factors. That requires some ADC headroom, so in theory creates missing codes. In practice, there's several bits of inherent ADC dithering which, digitally filtered, spackles over the holes.

John

Like that? Rob's idea. We used latching relays to avoid thermals on the 10 mV range. Our launch customer wanted a 10 mV range, which we thought was crazy, but they have money that we want. The eight data lines are 0/3.3v, and the four bank select lines are translated up to

0/5v, so we can park the drivers in a state where they don't run hot.

I guess you could matrix address the relays if you put a SOT-23 dual zener in series with each coil. But the drivers would be more complex, not worth it for just 32 relays.

John

K is the standard designator for relays. Don't know why.

Best regards, Spehro Pefhany

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"it's the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
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I like to think of things as they are, not what they're made out of. You have an instrumentation amp, not three funky opamps. ;-)

Yeah, I was originally looking at the diagram a little differently. In light of this, one of your DACs is superfluous.

I was expecting that you wouldn't get anywhere close to 60dB without. Looking again, your way of doing it and what we've done isn't all that different, except that you're using twice as many switches (and ours are integrated).

Yeah, I see your switches to do the zero correction. In ours we don't care about any of that, just need the dynamic range. Audio is easy.