Negative Voltage Generation using LM337

Hello,

I am building a variable output power supply using the LM2576 switching regulator. Please see the image which shows the circuit diagram here:

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The circuit uses a negative voltage generation sub-circuit to pull the ground pin of the LM2576 below 0 Volts so that the output of the LM2576 can vary from 0 Volts to some positive value. In the absence of this negative bias on the ground pin of the LM2576, the output would vary from its minimum value (1.23V) to some positive value.

The negative voltage generator consists of: C2, D2, D3, C3, C4, IC2, P3 and R3.

Voltage at C3 without connecting IC2 (which is a LM337) is observed at Vpeak (1.414 X 25V = 35V). However, when I connect the IC2 input, this voltage drops to 1.23V! (Interestingly, 1.23V is the Vref of the LM337.)

I am unable to understand why. The manufacturer specifies LM337*LZ* whereas, I am using a LM337 (from ST). The datasheets of these two ICs don't show any difference. Could the LM337 be very different than the LM337LZ?

I tried replacing the LM337 with a LM7905 and it works quite fine (-5V output is observed). Another thing that I tried is to use the center tap of transformer that generates the input AC voltage as ground. In this case, the LM337 works fine!

Any suggestions on how to debug this further? Any suggestions for an alternate method of generating a negative bias in this circuit?

Regards, Anand

Reply to
Anand P. Paralkar
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What do you mean by this? Do you mean using that as your reference for measuring voltages, or do you mean modifying the circuit in some way?

Sylvia.

Reply to
Sylvia Else

What I meant is:

1st Case: In the original circuit diagram, the ground reference of the circuit is placed at the negative output of the bridge rectifier that is used to supply the DC input to the LM2576. (Center tap of the transformer is not used.) 2nd Case: I modified the circuit by the connecting that ground point (negative output of the bridge rectifier) to the center tap of the transformer.

In the second case, the LM337 generates an regulated negative output voltage.

I would like to know why it does not work in the first case.

Thanks, Anand

Reply to
Anand P. Paralkar

Actually, it's so the FB pin can sense 1.25V from its negative supply, when the output is 0 V from the "ground". One could also use an op amp (summing junction) to arrange an offset instead ... It's VERY confusing to refer to a pulled-negative pin on the LM2576 as "gnd".

I'm not sure why, but the LM337 has absolute-max input voltage of 38 V or so, which is uncomfortably close to the input supply. I'd never use that circuit for anything that plugs into line voltage.

Reply to
whit3rd

Why do say so? There is a step down transformer to convert and isolate the line voltage and this circuit.

Thanks, Anand

Reply to
Anand P. Paralkar

In the first case try isolating C3 and the circuit to the left from IC2. This looks like it is supposed to generate a negative voltage and I would guess it is not doing the job. Maybe a diode is backwards?

I'm not sure if the circuit with D4, etc should be connected or not. Looks like that is there to bias the op amp power to near center of the range of the two supplies. I think it can stay on the IC2 side as a first try.

--

Rick
Reply to
rickman

It should work unless the LM337LZ you used was defective. However, keep in mind that the equivalent series resistance (ESR) of the output capacitor C4 matters. It should not be too low or the LM337 can oscillate. This is because it is a poorly compensated low-dropout regulator or LDO. Of course, the datasheets are vague as usual and don't state safe ESR ranges which is one reason why I do not use such regulators.

Hang a scope on the output of the LM337 and see if it oscillates. If it does, add a few hundred milliohms in series with C4 and check again. I can't tell you how much is needed because the datasheets are lacking.

A much better architecture is SEPIC. That allows an output voltage from zero even without such a negative helper supply.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

I might be slow but how would sepic help?

need something to way get the 1.23V on Vfb at what ever output voltage anyway

-Lasse

Reply to
Lasse Langwadt Christensen

Just sink a current into Vfb that raises Vfb to exactly the IC's reference voltage when the output is at zero volts. Or a smidgen higher to cover tempco drifts and such. Now you can adjust the normal feedback divider so you get any output voltage between 0V and some maximum.

The other way would be to use an opmap for the loop.

Funny story: When I introduced the SEPIC concept to a friend he kept inadvertently calling it a "septic converter " :-)

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

Line voltage fluctuates, and varies according to location (+/- 10 % is expected, and +20% is not unknown). I once had a working prototype that failed testing when it went to a building two blocks away, where the electric mains were on the high end of the nominal voltage range.

Reply to
whit3rd

The whole thing looks over kill for what you are trying to do..

If the supply coming in is isolated, which it looks like it maybe, then all you need is to lift the common to the rest of the circuit via a diode or maybe two, and you'll get the needed offset drop.

Diodes in isolated supplies for the common side is very common to adjusting the zero offset of the final output.. The limitations are you can not join the internal common to the rest of the circuit. Jamie

Reply to
M Philbrook

If you're connecting the transformer centre tap to the existing circuit ground, then you're shorting half (which half depends on the phase) of the transformer winding through a diode, which would significantly affect the output voltage. If there's an over-voltage issue with the regulator, then that could explain why it seems to start working in this situation.

If the output voltage is not being changed, it suggests an open circuit or high resistance path, where there should not be one.

Sylvia.

Reply to
Sylvia Else

Are you sure the LM337 has that problem? I cannot find any mention in the datasheet, and it really isn't a LDO like say a LM2950 which has specified requirements not to use low ESR caps

Cheers

Klaus

Reply to
Klaus Kragelund

I've seen it, cap that works with 317, makes an 337 oscillate

-Lasse

Reply to
Lasse Langwadt Christensen

Ok. Good information :-)

Cheers

Klaus

Reply to
Klaus Kragelund

Yup. Both use NPN pass transistors, so with the negative regulator you're coming out the collector, as in an LDO. The open-loop output impedance is high, making it vulnerable.

BTW an electrolytic in parallel with a ceramic functions as a lead-lag network, so if you pick the values right, you can get the best of both worlds.

Cheers

Phil Hobbs

Reply to
Phil Hobbs

I've seen it too, on a recent PCB. The 337 oscillated with a 10uF MLCC cap on the output. The 317 didn't quite oscillate but would ring so badly that it was also not really usable. I found that putting resistors (e.g. 0.47 Ohms) between the regulators and the capacitors would cure it. (Of course take the tap off for the resistor to the ADJ pin directly from the regulator output.) On my existing PCB the series resistors were not desirable because the capacitors were at the same place as the load so the load regulation was worsened due to the resistance. An alternative and very successful cure was to place 100uF tantalums in parallel with the 10uF MLCCs. I would rather not use tantalums but that fixed it and I didn't have space for aluminium electrolytics. Maybe a more expensive and better compensated regulator would be the best solution.

Chris

Reply to
Chris Jones

On Fri, 31 Jul 2015 08:00:00 -0700, Joerg Gave us:

snip

You should have told him that his observation wasn't very septic.

Reply to
DecadentLinuxUserNumeroUno

On Fri, 31 Jul 2015 14:02:11 -0400, M Philbrook Gave us:

Your whole observation is about as stupid as it gets, as usual.

You ain't real bright.

Doh!

Reply to
DecadentLinuxUserNumeroUno

Or if you need more precision: Call the low-ESR cap C_byp Call the "bulk" lossy cap C_bulk + ESR The "ideal value" is C_bulk >= 2.5 C_byp, and ESR = 1 / (2*pi*F_lead*C_byp).

Also works for the R+C dampers on ringing switchers, etc. You'll have to solve for C_byp first in that case, since it's composed of junction, stray and winding capacitances.

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
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Reply to
Tim Williams

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