Need to construct the logical reverse of a 7448 - perhaps using a GAL

Ok, a 7 segment display to BCD converter. The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should be sufficient to produce a PLA or SSI implementation.

So, do I get a finders fee?

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That was fast, Jeff! Did you whip that up just now? I am impressed.

Dinner on me next time you are in Vancouver, BC! Or a donation to your favourite charity perhaps?

John :-#)#

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Opps, I did not define the parameters correctly - it is the full 7448 table, minus the Lamp Test that is needed 0 - 15. I think I can figure the extra alpha characters from what you have provided.

Thanks again,

John :-#)#

And I see now that this was built by three other guys: Imran Khan, Jabbar Khan, and Kaved Iqbal. Perhaps some thought exercise? The tables show up in a few places, but haven't found the original and the bottom of the schematic appears to be clipped.

Still it gives me enough to work with and I can fill in the rest. Mostly it is getting the correct place to start that screws me up...

Jeff, I'll still buy you a dinner if you get up to Vancouver, BC area!

John :-#)#

This logic diagram is not optimal. I guess a Karnaugh map for 7 inputs is not so easy to draw. I was thinking about this recently. When I was in sc hool they taught Karnaugh maps because you would use them from time to time . Later they taught Karnaugh maps because you needed to know how they work ed so you could potentially write your own minimization programs I suppose. I expect they barely teach Karnaugh maps because there is tons of softwar e around to do this for you much as they don't emphasize simple arithmetic when you will likely use a calculator.

I think this is a lot simpler to construct from SSI than the diagram shown. Or maybe a very few MSI devices could be used. Or mux logic (which I was taught in school) could be used much as is done in FPGAs. I haven't check ed, but I bet this could be done with maybe six devices.

Rick C.

Switch to full screen view and the bottom of the tables and schematics will magically appear.

I think the original was a powerpoint presentation, but I didn't bother trying to find it. I'll do some digging and post what I find after I extract all the wood splinters from my hands. Searching for the 3 authors names, or an image search by one of the graphics pages should work.

Probably not, but I do have some friends along the way I wouldn't mind visiting.

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Jeff Liebermann     jeffl@cruzio.com 
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One way to do it is to use an EPROM. Connect the seven segments to AD0 to AD6. Use the first four data outputs (D0 to D3) for the BCD code. Make up a table with the correct memory locations to put 1s in for the decoder. Tie /CE and /CS to the appropriate levels. A 2716 would work fine, just ignore the unwanted outputs and tie AD7 to ground.

Regards

s

the

n

is not so easy to draw. I was thinking about this recently. When I was in school they taught Karnaugh maps because you would use them from time to time. Later they taught Karnaugh maps because you needed to know how they worked so you could potentially write your own minimization program s I suppose. I expect they barely teach Karnaugh maps because there is t ons of software around to do this for you much as they don't emphasize si mple arithmetic when you will likely use a calculator.

own. Or maybe a very few MSI devices could be used. Or mux logic (which I was taught in school) could be used much as is done in FPGAs. I haven 't checked, but I bet this could be done with maybe six devices.

My thought was to trick a GAL into being essentially a ROM lookup table.

should be enough gates inside for that.

Using the link Jeff provided I have adapted the boolean equations that I

am hoping can be further simplified, (f' = NOT-f), but I am done for no w:

W = abcdfg + bcdef?g + a?b?cdefg + a?b? ??c?def?g? + abc?defg + ab?c? ??d?efg

X = ab?cdfg+ a?bcd?e?fg+ abcd?e ?f?g? + a?b?c?def? g? + a?bcdef?g + abc?defg + ab?c?d?efg

Y = abc?deg + abcdf?g + ab?cdefg + abcd? e?f?g? + abcdef?g + a?b?c defg + ab?c?d?efg

Z = bcd?e?f?g?+ abcde?g+ ab? ?cde?fg + a?b?cdefg + a?bcdef?g + ab?c?d?efg

Truth table can't display it here, so I put it here:

ftp://flippers.com//usr/www/users/flip/images/temp/7-segment-to-BCD-truth

-table.png

John :-#)#

Here's the original PPT presentation:

You can download the presentation as JPG's. Scroll down to "Presentation Transcript". Click on the titles of each page that are to the right of the thumbnail image. You should get a JPG of each page. Back to pulling splinters (don't ask what I did wrong this time).

The schematic does look like the bottom is cut off, but it's not. Those 7 lines are the 7 input lines drawn as a bus. There's nothing connected to them below the bottom of the page where they end.

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Jeff Liebermann     jeffl@cruzio.com 
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Skype: JeffLiebermann     AE6KS    831-336-2558

550 no such directory.

--
Jeff Liebermann     jeffl@cruzio.com 
150 Felker St #D    http://www.LearnByDestroying.com 
Santa Cruz CA 95060 http://802.11junk.com 
Skype: JeffLiebermann     AE6KS    831-336-2558

s

the

n

is not so easy to draw. I was thinking about this recently. When I was i n school they taught Karnaugh maps because you would use them from time to time. Later they taught Karnaugh maps because you needed to know how they worked so you could potentially write your own minimization programs I supp ose. I expect they barely teach Karnaugh maps because there is tons of sof tware around to do this for you much as they don't emphasize simple arithme tic when you will likely use a calculator.

own. Or maybe a very few MSI devices could be used. Or mux logic (which I was taught in school) could be used much as is done in FPGAs. I haven't c hecked, but I bet this could be done with maybe six devices.

w:

?c?def?g? + abc?defg + ab?c ?d?efg

W = (b'+d'+f'+g')'

This is an example of how much simpler the optimized equations can be. To do this using tools, you would need to complete the full 128 state table wi th don't cares which could be done with a simple program. Then a tool coul d be used to find the optimized equations.

I did this by inspection of the short table finding the inputs required to distinguish the output values. I don't think minimizing the equations usin g Boolean logic would be enough.

I don't have the full 16 character table so this may not be the actual answ er you need.

?f?g? + a?b?c?def?g ? + a?bcdef?g +

?e?f?g? + abcdef?g + a?b? cdefg +

??cde?fg + a?b?cdefg + a?bcdef? g + ab?c?d?efg

-table.png

Rick C.

Might as well just use an 8 bit microcontroller like the ATTiny 2313, it's a dollar in quantity, doesn't need any external hardware to run at ~8MHz which is plenty, has 2 kilobytes of program memory which is plenty.

then just sort of the KISS-ish program I can think of, in C++-ish:

struct State { bool seg_1 = false; bool seg_2 = false; bool seg_3 = false; bool seg_4 = false; bool seg_5 = false; bool seg_6 = false; bool seg_7 = false; };

void read_state(State* state) { state->seg_1 = digitalRead(DIGITAL_IN_PIN_1); state->seg_2 = digitalRead(DIGITAL_IN_PIN_2);

// etc... }

int decode_state(const State* state) { if (state->seg_1 && state->seg_2) { return 0x1; } else if (state->... {

// etc

} else { return -1; } }

void write_values(int value) { switch (value) { case 0:

digitalWrite(OUT_PIN_0, 0); digitalWrite(OUT_PIN_1, 0); digitalWrite(OUT_PIN_2, 0); digitalWrite(OUT_PIN_3, 0); break;

case 1: digitalWrite(OUT_PIN_0, 1); digitalWrite(OUT_PIN_1, 0); digitalWrite(OUT_PIN_2, 0); digitalWrite(OUT_PIN_3, 0); break;

case 2:

digitalWrite(OUT_PIN_0, 0); digitalWrite(OUT_PIN_1, 1); digitalWrite(OUT_PIN_2, 0); digitalWrite(OUT_PIN_3, 0); break; // etc.

default: //do something if "decode_state" returns -1 = invalid state } }

int main() { State state;

for (;;) { // loop forever read_state(&state); write_values(decode_state(&state)); }

}

Crap, this is correct:

Thanks,

John :-#)#

Was looking for tiny, I have lots of Eproms, but space, eh? An Eprom would be simple too. The look up table would only take 15 bytes, you would use the Address lines A0-A3 with the Data lines being the outputs. Easy, but too big for my application. I guess I could use a tiny EPROM, should have looked for that I guess. Got caught up in elegant solutions...

John :-#)#

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MOVED to #7 - 3979 Marine Way, Burnaby, BC, Canada V5J 5E3 
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        "Old pinballers never die, they just flip out."

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ts is not so easy to draw. I was thinking about this recently. When I w as in school they taught Karnaugh maps because you would use them from ti me to time. Later they taught Karnaugh maps because you needed to know h ow they worked so you could potentially write your own minimization progr ams I suppose. I expect they barely teach Karnaugh maps because there is tons of software around to do this for you much as they don't emphasize simple arithmetic when you will likely use a calculator.

shown. Or maybe a very few MSI devices could be used. Or mux logic (whi ch I was taught in school) could be used much as is done in FPGAs. I hav en't checked, but I bet this could be done with maybe six devices.

e.

I

now:

b?c?def?g? + abc?defg + ab? c?d?efg

To do this using tools, you would need to complete the full 128 state ta ble with don't cares which could be done with a simple program. Then a t ool could be used to find the optimized equations.

to distinguish the output values. I don't think minimizing the equation s using Boolean logic would be enough.

answer you need.

e?f?g? + a?b?c?def? g? + a?bcdef?g +

?e?f?g? + abcdef?g + a?b? cdefg +

??cde?fg + a?b?cdefg + a?bcdef? g + ab?c?d?efg

ed)

Interesting, and the corrected link is:

Thanks for taking the time!

John :-#)#

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(Please post followups or tech inquiries to the USENET newsgroup) 
                      John's Jukes Ltd. 
MOVED to #7 - 3979 Marine Way, Burnaby, BC, Canada V5J 5E3 
          (604)872-5757 (Pinballs, Jukes, Video Games) 
                      www.flippers.com 
        "Old pinballers never die, they just flip out."

Someone I knew got bitten by that. He had an EPROM that contained dynamic logic. It would present the correct data, but after some time the data turned wrong. Hold time was not eternal.

Perfectly OK for a processor, but not for character mapping of a mechanical teletype.

:-) Gerhard

to

Tie

.

...

EPROMs can be nice for this sort of thing, but there are likely to be some glitches before the outputs settle to the values you are expecting. This may or may not matter, depending on what comes next in your system. If one of the outputs is being used to generate a clock for a peripheral it really matters!

As mentioned above, a small processor will probably give you the smallest solution.

John

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ns...

This is for very slow logic - a few hertz - so settling time is not an issue. Basically I am taking the output of a still available obsolete CPU that originally fed a 7-segment display directly through a driver and using it to replace an unobtanium obsolete CPU array that drove a

7448 - want the circuit to be simple from the end users perspective - rip the 3 old chips out and plug in a replacement sub-board with no added work required. An $1.50USD EPROM is just fine and saves me a bunch

of time in the design stage. Production is expected to be low, under

50/year, but keeps those customers happy!

Thanks for all the suggestions!

John :-#)#

Swell. Now you want it small. Perhaps something like a 28C16A:

--
Jeff Liebermann     jeffl@cruzio.com 
150 Felker St #D    http://www.LearnByDestroying.com 
Santa Cruz CA 95060 http://802.11junk.com 
Skype: JeffLiebermann     AE6KS    831-336-2558