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multi-stage Voltage multiplier output voltage instability

I have a X10 half wave voltage multiplier simular to this one.

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The input is 200Vp-p at 50KHz signwave. The output is ~2kV.

It is constructed with NPO caps of 33uF each and Cree 1A 600V SiC diodes.

I run the HV output tap through a RC filter (1meg and 1000pF 3kV NPO) to filter remaining ripple on the output. This does a good job with the

50KHz ripple however there is a an unexplained low'ish' frequency "rumble" on the output voltage. The rumble is about 2Vp-p in the hundreds of Hz to low KHz range. The rumble appears random in nature and doesn't change much with changes in input frequency. There isn't any synchronous "beating" with the input frequency that I can identify.

I've run spice simulations and live lab tests and they both show the same performance. I know 2V riding on 2kV is small but I would like to know where this is coming from.

Any ideas or experience with this?

chaos theory?

Reply to
Mook Johnson
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This caps should be should be 33nF not uF.

thanks

Reply to
Mook Johnson

It has to be either the input frequency or voltage, or the components. You could trouble-shoot it and narrow the possibilities.

Why not monitor the 2x voltage node ripple (simplifying the problem to two caps and two diodes) and work from there?

I suspect the "rumble" is from the input changing, but you could see if it's some funky diode recovery-thing by switching diode types. Better or worse, if changing diodes changes it, that's the source.

Cheers, James Arthur

Reply to
dagmargoodboat

So the spice sim shows the same "rumble"? I was going to guess some weird thermal effects in the diodes, and as a test try a heat gun and see if that changed anything. But if spice shows the same thing, them I'm confused.

George H.

Reply to
George Herold

1A diodes, recovery, and 50KHz could do weird stuff.

I missed that it shows in the sim too.

Cheers, James

Reply to
dagmargoodboat

Would you post your schematic as a text file? Either PSpice .cir or LTspice version 4 etc.

Is there an interaction between the dynamics of the caps and diode resistances and your last output filter stage? Was your output unloaded?

I used to work in these 'stack multipliers' but we produced 200kV and had to use rings at each diode termination to force voltage gradients to be controlled. Since spice shows the same thing am a bit confused. However you may be observing a simultaneous problem. Your breadboard of the stack has some problem and your spice analyses has a walking error caused by the maximum step size in the .tran analysis being too large. The result is a 'walking' error in your spice solution that may only 'look' like what you saw in the breadboard, yet be totally unrelated. Spice often does that because it lands on a 'close enough' solution, then solves the next time point causing a LOT of noise being injected into the spice solution that does not relate to anything. Again, could have checked that if you had posted more info.

Just curious, this is pretty 'low' voltage, why did you opt for a diode stack and all its problems, versus a good step up transformer? At these low voltages, you can include the transformer in the control loop and adjust for all its ills. so, in manufacturing the spec on the transformer can be really loose, and therefore cheap.

Reply to
RobertMacy

It would be really interesting if this were caused by the nonlinear diode capacitance. It's sort of a distributed parametric amplifier.

Post the Spice model, please.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

If you look at different taps along the stack, does the "rumble" level increase linearly with the multiplication? Or is there a point where it comes on all at once?

Have you looked at your input source, when it is connected to nothing else? Can you put some kind of buffer or follower between your source and the multiplier to see if that changes things?

At the forward voltages of your diodes and the frequencies you are seeing, I don't like this answer too much, but: maybe you have built a crystal set. Any big transmitters nearby? Do you see any voltage coming out of the multiplier with an open input? Or a shorted input?

Matt Roberds

Reply to
mroberds

Apparently it does this in Spice, too.

How can a Spice circuit make low frequency noise? It would have to amplify, or at least get kicked off, by floating point rounding or something.

--

John Larkin         Highland Technology, Inc 
picosecond timing   laser drivers and controllers 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

It's probably the R/C decay "frequency". Change the cap values and see if the "rumble" frequency changes. ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142     Skype: skypeanalog  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Put on choke on the output.

Jamie

Reply to
Maynard A. Philbrook Jr.

It's the Vf on the diodes. At different loads in the chain of diodes the forward voltage time is changing, this can build up into what looks like a low frequency ramp and deramp effect that interacts with the caps and load on the overall multiplier.

Generally, using high value R's and small caps with the diodes usually fixes this. Make a Diode model that has these values on it.

Jamie

Reply to
Maynard A. Philbrook Jr.

For the spice "noise" it could be a transient effect, I could imagine the voltage rippling up and down.

george H.

Reply to
George Herold

On Sat, 15 Nov 2014 13:38:24 -0800, John Larkin Gave us:

I really don't know if it was magic or not, but we had odd problems get clean drive signatures "up there".

You might think I am stupid... but you know what... if you re-tune it all for about 57 - 59kHz, ferrite core transformers and HV caps seem to like it.

We have several designs that ended up being "happiest" up in that region, and solved weird "PARD" problems simply by shifting the fo.

We were often stumped for an exact reason for the warmer, fuzzier feeling the circuit got up there.

We said magneto-striction was the cause... capacitor internal resonance of some kind... we never did put a finger on it.

Give it a try. Not much magic in electronics, but...

Reply to
DecadentLinuxUserNumeroUno

OK, I just ran LTspice of a ten stage Voltage Multiplier like you described. [POST YOUR SCHEMATIC!!! and MODELS!!!] My analysis ran smoothly. doing a quick check of the FFT [a great place to look to see if numerical analyses noise has crept in] showed the noise floor as a clean straight line which represented more likely the truncation errors than 'rumbling' you described. Even that noise was below 0.1Vrms not your report 2Vpp. And would have gone smaller had I changed the options and maximum time step. didn't bother, since the first pass does NOT confirm any rumbling. Very well-behaved output.

Now back to your breadboard. How 'clean' is the source 200Vpp? Can't believe you have 0.2Vpp ripple on it, but is possible.

Put a spectrum analyzer in there and look for NOISE vs TONES, You might find the SMPS power supply/AC mains/AM radio station pickup is putting some very weird beat tones. At least with an SA, you have a hope of finding an origin.

Reply to
RobertMacy

I saw that in the post, but I can't explain it.

Looking at different taps along the stack still might be interesting in Spice.

The crystal-set thing wouldn't apply in Spice, unless your PC is sitting right on top of a cell tower antenna or something. :) (And if you can reliably use RF to make the computer do math *slightly* wrong rather than crashing outright, several people are willing to make you an offer you can't refuse...)

Would it be useful to construct a Spice circuit involving a 2 kV AC source, one diode, and one cap? Maybe this would show that the diode or cap model is having trouble when operated at higher voltages. On the other hand, as I understand this kind of multiplier circuit, none of the individual components "sees" the full output voltage.

I wonder if the Spice circuit (or, for that matter, the bench circuit) was working into any kind of load? The OP mentioned an RC filter on the output, but was there any load after that?

Matt Roberds

Reply to
mroberds

Hey Mook! How about a reply? You post here some, but it's no fun for us if we don't hear the outcome.

George H.

Reply to
George Herold

Looking to post the spice file. I'm using Simetrix and looking for an export function.

Output was "loaded" with 20MEG (100uA).

Went this way because we needed low profile more than anything else.

Reply to
Mook Johnson

Post .CIR/.NET or combination thereof ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142     Skype: skypeanalog  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Try this one

*#SIMETRIX C10 C10_P C8_P 33n C11 D6_N D5_N 33n V1 V1_P 0 5 Sine(0 100 15k 0 0) C12 C12_P C10_P 33n C13 D7_N D6_N 33n C14 C14_P C12_P 33n R1 R6_N C21_P 5k C15 D8_N D7_N 33n R2 R6_N 0 20Meg C16 C16_P C14_P 33n R3 0 C21_N 50k C17 D9_N D8_N 33n D10 C1_P D10_N CSD01060 C39 R6_N 0 1n C18 C18_P C16_P 33n R6 D1_N R6_N 1Meg C19 D1_N D9_N 33n D11 D10_N C2_P CSD01060 D12 D2_N C4_P CSD01060 D1 C18_P D1_N CSD01060 D13 D3_N C6_P CSD01060 D14 D4_N C8_P CSD01060 D2 C2_P D2_N CSD01060 D15 D5_N C10_P CSD01060 D3 C4_P D3_N CSD01060 D16 D6_N C12_P CSD01060 D4 C6_P D4_N CSD01060 D17 D7_N C14_P CSD01060 D5 C8_P D5_N CSD01060 D18 D8_N C16_P CSD01060 D6 C10_P D6_N CSD01060 D19 D9_N C18_P CSD01060 D7 C12_P D7_N CSD01060 D8 C14_P D8_N CSD01060 D9 C16_P D9_N CSD01060 C20 D10_N 0 33n C21 C21_P C21_N 1n D20 0 C1_P CSD01060 C1 C1_P V1_P 33n C2 C2_P C1_P 33n C3 D2_N D10_N 33n C4 C4_P C2_P 33n C5 D3_N D2_N 33n C6 C6_P C4_P 33n C7 D4_N D3_N 33n C8 C8_P C6_P 33n C9 D5_N D4_N 33n .GRAPH C21_N axisType="auto" persistence=-1 curveLabel="pulse amp input" xLog="auto" yLog="auto" nowarn=true .GRAPH R6_N axisType="auto" persistence=-1 curveLabel="VOUT_filt" xLog="auto" yLog="auto" nowarn=true .GRAPH D1_N axisType="auto" persistence=-1 curveLabel="VOUT_REAL" xLog="auto" yLog="auto" nowarn=true .TRAN 100m *.AC DEC 25 1m 1Meg
Reply to
Mook Johnson

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