Microchip ref design

Was looking at one of Microchip's reference designs for a Wheatstone bridge sensor.

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Was curious about how they justify using 20K resistors feeding the ADC input that calls for a 2.5K maximum source impedance. Granted that the ADC input hold capacitor is 25pF and the output of the instrumentation amp has 1uF diff and common mode caps. I would guess that this is valid for only low sampling rates. High sampling rates would make for a larger load on the ADC input and cause error. Am I correct or missing something?

Aside from the schematic and component data sheets, aren't many details. From the schematic, there are two instrumentation amps for comparison. They both are fed from the came Wheatstone bridge which has some common mode 'noise' injected. The Hexfile that is available is likely programmed into the PIC, no source included. The Thermal Management Utility appears to run on the PC and accesses the demo board.

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Oppie
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Looks like a pretty miserable circuit to me. The ADC input error may not be the biggest problem. Rushed out to meet the introduction date of the Inamp?

IOW, to demo the CMRR. "Reference design"?

Best regards, Spehro Pefhany

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Reply to
Spehro Pefhany

What would be the point of sampling the output of a low pass RC filter with

20ms time constant at high rates?

My rough calculations indicate at 100Hz sampling rate the sampling capacitor charge current will give about 1/5th of an ADC bit error from 20k source impedance.

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nospam

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