MAX5062 + PIC and PWM

You don't show or specify the config of the bridge you're using ? Are you using N & P channels or all N channels as shown in the MAX data sheet? If you're following the MAX data sheet with their examples? I would say you're using all N channels .

For the Hbridege to work properly for a DC load, you need N and P channels for Low and high side switching also, you would need 2 PWM outputs or 2 IO's to en/dis able the MAX of choice to drive the correct direction. Also, selecting the correct MAX chip operation plays a roll here! Did you work into the design the Non/inverting combinations MAX has ?

A lot can be said with out seeing the schematic of what you're currently trying to attempt.

P.S. PIC's normally do have CCL/OC and most of them have a register setting to create a pull up but then again, I don't know if that is a transistor or R pull up.

I don' tknow what your talking about when you say you have to have a P and an N.

I've posted a schematic in free.binaries.schematics.electronic.

I've posted a schematic in free.binaries.schematics.electronic.

I was able to configure the pic to use open drain so that I can get the right voltage... but a new issue came about. It worked fine with an led but when I hooked up a motor to it, it burned up. First one of the max chips went bad then after replacing that something started smoking(and I'm not sure what). It happaned within a few seconds.

Maybe my schematic is bad? Can anyone see why it would smoke only after a few seconds(like 1 or 2)? (I didn't have a heat sink up to it but I wasn't drawing more than 2-4 amps most likely).

There was no direct short through the mosfets as I have 3 of the 4 hard wired for testing(unless one of the IC's are malfunctioning). Again, it was working fine with an LED so it had something to do with pulling too much current but the motor wasn't turning that fast so it couldn't have been too much current... the first time was the max and I think it's the same this time but haven't diagnosed it yet.

Ok, that explains it.

explains what? You do realize that the max drives an N on the high side?

Sure I do how ever, you neglected to see what the N is driving!. it makes a difference. I really don't think you're doing what the data sheet shows as examples. The source (FET) needs to be on a rail for constant control. The Max examples are using the HS return which helps the driver to offset the Gate drive to make up for what the Vgs is not getting. and also, you'll see the BST getting used, this is needed to boost the voltage for the gate on the high side along with the use of induction coupled loads. All of that is being done just because no P channel fet is being used in the example for the high side..

Simply put, the high side gate to source voltage (Vgs) needs to be well into its on region for proper function. If you are sourcing a load with a N channel Fet, how do you think you're going to get the required voltage if the load it self wants to be at or above the gate turn on voltage?

Looking at the MaX examples, you'll notice most of their examples use inductive loads of some kind. This plays well with the need to boost voltages.

btw, I didn't look at your schematic because I wasn't able to get my reader to except it as a valid group, maybe my service is dumping it who knows. It would be better if you just pointed it to your personal web page or a home server etc..

Do you have any idea what your talking about? The reason its not P is because the drivers are not P. P is more expensive, has higher on resistance. These chips are made to drive N ch high side mosfets. Thats the whole point!

Damn ;/ Do you realize that these chips have an internal boost circuit that delivers the required voltage?

Yes I know what I'm talking about here and you obviously have over looked the examples given by MAX in the PDF..

You didn't specify the type of load you have connected to header 2 (P3)

I have no idea what you're load type is going to be how ever, I can only imagine that your attempts have most likely cooked a couple of fets along with possibly a driver with that circuit if you're doing a DC load on the high side of the bridge. Unless of course you have the FETS heat sinked well and can handle the spec load in the analog range which I doubt..

WTF, what did I tell you the BST was for? and putting that in prospective, that circuit can not have a low carrier rate other wise, the boost will dissipate early.

And for your information, I haven't found P channel Fets costing much different than N channel in the power switching family.. so you can take that argument else where.

After seeing all of this, I am sure the Vg(on) is out of range also.

Please place a scope on the bridge, if you know how to use one it'll tell you everything I have been trying to explain to you.

Btw, I've made a circuit like that before using a boost cap feed back circuit from the output bridge so that I could use all the same Fets. It only works well at high speed carrier and you must have a gap before direction shifts other wise, you'll heat up in the bridge. we used ~50k.

The MAX as a propagation delay that you must work around also.

It's obvious who is having the problem..

The 5062 has a TTL-compatible version. Signal integrity issues are obviously a first priority. Don't bother hooking up power until this is addressed at the preliminary design stage.

Level shifting is an option,

------------------------------ +10 / \\ / 4k7 \\ 5V ------------ l l l------------------ NI out / l 4k7 \\ / / / \\ l l------------l npn / l \\ \\ 4k7 / \\>

\\ l l l in -----------+----------------+

RL