The Baxandall Class-D oscillator makes sine waves, and can be better than 95% efficient.
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It takes a transformer and an inductor, and the sine wave isn't all that clean.
I've got a variant that leaves out the inductor and produces a much cleaner sine wave (harmonics around 80dB below the fundamental) but it's only about 50% efficient. It does need more parts.
As an LC oscillator the frequency is as temperature dependent as the the inductance of the transformer (which can be a gapped ferrite core). You can play games to get it better but they tend to need lots more parts.
I'm not satisfied that the "core loss" element is fit to FMAX. It works, but it's hacky. I'd rather have it fit to R1, SRF.
Among the selection of parts I've been testing against, this seems to be pretty close, over- or under-estimating Q or ESR by only a modest amount. The ones with significant k4 seem to work less well, causing error in |L| as well as SRF.
I realise that one day, I will die. So, I now include in a special folder, all my "Einstein was not wrong" papers.
One point is that I have generated 100+ examples to also function as electronic tutorials, not just as a demo for SS. They demonstrate loads of different standard concepts in electronics, such as sub-ranging ADS, weaver modulators, SMPS, Sigma-delta conversion, PLL etc...
I wish to synchronously sample a 60 kHz signal at 240 kHz. I can't find either 120 or 240 kHz crystals. I *can* find 40 kHz crystals which would give me 120 kHz at the third overtone (or close to it).
I've read enough about this to be thoroughly scared off the prospect and am now looking at using a 32.768 kHz reference (which I need anyway) to drive a frequency locked loop by tuning an LC oscillator. It would have an update rate on the order of 1 Hz, so the stability could be pretty close to that of the 32.768 kHz reference. In simulation the power consumption can be pretty low. I think I'm about ready to build one and give it a try.
There are plenty of small ARM Cortex-M chips with built-in counter-timers. Get one of them with a decent crystal (say in the range of
5 to 20 MHz) and divide from it with the built-in timer. The cost will be just some dollars for the components.
A small Cortex evaluation unit can be had for some tens of dollars, and there are the crystal and board built-in, together with some means of getting the code in.
Thanks for the suggestion, but that does not fit the problem space. The FPGA board I am prototyping with has an oscillator on board, just not a multiple of 240 kHz. This is a very low power design and every ARM type CPU I have seen will consume mAs of current with the high speed crystal controlled clock.
One good note. I discovered the oscillator frequency on this proto board is controlled by a resistor. You can also inject a current or voltage to modify the frequency creating a VCO. So I can make a first pass at frequency locking this oscillator. It won't be so low current, but it's still better than a multi-MHz crystal.
How about a free running CPU clock running at a few MHz and a crystal in 0.5 to 1.5 MHz range generating an interrupt about every microsecond. The interrupt updates the NCO (numerical controlled oscillator) 16 to 32 bit phase accumulator and some bits are written to the output pins. The rest of the time, the processor is kept in a low power sleep mode. If sin/cos output is needed, insert a sine lookup table between the phase accumulator and output pins. These should not require many instructions, so the power consumption should be low.
I appreciate the suggestion, but why all the complexity? If I have a crystal creating a clock, I don't need the CPU. What you described is way more power and complexity than needed.
I understood that you originally had problems ordering a crystal for the exact integer multiple of 120 kHz. The NCO principle allows you to generate any frequency from an other frequency, which doesn't have to be harmonically related, as long as the Nyquist criterion is followed.
Regarding timepiece crystals, NT cut crystals have been made for 32 and 131 kHz, while DT cut has been used for 272 and 327 kHz. So if you want 240 or 480 kHz, look for DT cut crystals. How many do you need ? Some small crystal house might even make single crystals, but the cost can be high.
I do not know about DT cut, but I have ordered AT cut crystals in units of one for each frequency.
That's not entirely correct. To get an exact value the reference frequency and the target frequency must be related by the ratio of two integers. Fclk = Fref * NCOstep / NCOmodulus where NCOstep is the phase increment and NCOmodulus is the modulus of the phase accumulator.
I'd be happy with a handful, 5 to 10. I've contacted crystal manufacturers and they don't want to make anything for me that isn't a standard item.
I can do without the crystal I think. I can use 32.768 kHz as my reference. I can buy real time clock chips with temperature compensation and a programmable output intended for a processor interrupt. That output can be set for 1 second or other rates and used to time an LC oscillator. The LC oscillator can be trimmed with a varactor from the frequency measurement. I may start testing this tomorrow.
A fractional-n divider can get you there with less hardware and a marginall y tighter control loop. It took me a while to find the phrase "fractional-n divider" - haven't thought about them for many years.
The highest common frequency of 32,768hZ and 120kHz is 64Hz - you have to d ivide the 32,768Hz by 512 to get that, and 120kHz by 1875. If you divide th e 120kHz by 937 and 938 in successive intervals, you get something close to 128Hz. If you divide it by 468 over one interval, and by 469 over the next three intervals, you get something close to 256Hz. If you divide by 234 ov er five intervals and 235 over three, you get something close to 512Hz.
For most practical purposes, counting three ticks of the 120kHz clock then four (and sometimes four again - specifically 205 three ticks and 315 four ticks) will let you lock exactly to the 32,768Hz clock.
The phase error will gad about a bit in the short term, but a sufficiently slow four- or more-pole low pass filter in the feedback loop will clean tha t out.
Why bother with a varactor? The voltage controlled oscillator in a regular
Increasing the phase accumulator width is usually cheap. Most people think about 16/24 bit phase accumulators. I have used 64 bit accumulators in some time keeping applications. Of course, this is ultimately limited by the accuracy of the frequency source.
When doing the NCO in software using longer phase accumulators than the machine word, one has to be careful how the phase accumulator value is copied to the outside world from the ISR (interrupt service routine). Copying only the most significant machine word should be OK and let the ISR also increment locally the "invisible" low part of the phase accumulator should do the trick.
Discarding (or rounding, same thing) part of the phase word before converting to a sine wave introduces a jitter which shows up as spurs close to the fundamental and so can not be easily filtered. Phase truncation creates real problems for many apps.
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